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[/] [amber/] [trunk/] [hw/] [tests/] [uart_rxint.S] - Rev 2
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/*****************************************************************// //// Amber 2 System UART Test //// //// This file is part of the Amber project //// http://www.opencores.org/project,amber //// //// Description //// Tests the UART receive interrupt function //// Some text is sent from the test_uart to the uart //// and an interrupt generated. //// //// Author(s): //// - Conor Santifort, csantifort.amber@gmail.com //// ////////////////////////////////////////////////////////////////////// //// Copyright (C) 2010 Authors and OPENCORES.ORG //// //// This source file may be used and distributed without //// restriction provided that this copyright statement is not //// removed from the file and that any derivative work contains //// the original copyright notice and the associated disclaimer. //// //// This source file is free software; you can redistribute it //// and/or modify it under the terms of the GNU Lesser General //// Public License as published by the Free Software Foundation; //// either version 2.1 of the License, or (at your option) any //// later version. //// //// This source is distributed in the hope that it will be //// useful, but WITHOUT ANY WARRANTY; without even the implied //// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// PURPOSE. See the GNU Lesser General Public License for more //// details. //// //// You should have received a copy of the GNU Lesser General //// Public License along with this source; if not, download it //// from http://www.opencores.org/lgpl.shtml //// //*****************************************************************/#include "amber_registers.h".section .text.globl mainmain:/* 0x00 Reset Interrupt vector address */b start/* 0x04 Undefined Instruction Interrupt vector address */b testfail/* 0x08 SWI Interrupt vector address */b testfail/* 0x0c Prefetch abort Interrupt vector address */b testfail/* 0x10 Data abort Interrupt vector address */b testfailb testfail/* 0x18 IRQ vector address */b service_irq/* 0x1c FIRQ vector address */b testfailstart:/* Switch to User Mode *//* and unset interrupt mask bits */mov r0, #0x00000000teqp pc, r0@ Configure the Amber UART to use the FIFO to receiveldr r4, AdrUART0LCRHmov r5, #0x10str r5, [r4]@ Configure the Amber UART to enable the receive interruptldr r4, AdrUART0CRmov r5, #0x10str r5, [r4]@ Configure the interrupt controller to enable the UART0 interruptldr r4, AdrIC_IRQ0_ENABLESETmov r5, #0x2str r5, [r4]@ Load some bytes into the testbench uart@ so it can transmit them to the Amber UARTldr r4, AdrTEST_UART_TXDldr r5, =Messageldr r9, =Messageldr r7, =EndMessageldr r8, AdrTEST_UART_STATUS@ transmit a byte from test uartldrb r6, [r5], #1str r6, [r4]@ test_uart transmit enableldr r0, AdrTEST_UART_CONTROLmov r1, #1str r1, [r0]main_loop:@ wait if test_uart tx fifo full1: ldr r0, [r8]ands r0, r0, #2bne 1b@ transmit a byte from test uartldrb r6, [r5], #1str r6, [r4]@ full message transmitted?cmp r5, r7bne main_loop@ while test_uart tx fifo empty == 02: ldr r0, [r8]ands r0, r0, #1beq 2b@ wait until uart tx fifo empty == 1ldr r3, AdrUART0FR @ flags3: ldr r1, [r3]ands r1, r1, #0x80beq 3bb testpass@ ------------------------------------------@ ------------------------------------------service_irq:ldr r2, AdrUART0DR @ rx/tx byteldr r3, AdrUART0FR @ flags1: ldr r0, [r3]ands r0, r0, #0x10@ Jump straight back to normal execution if rx fifo emptysubnes pc, lr, #4ldrb r0, [r2] @ uart rx byteldrb r1, [r9], #1 @ transmitted textcmp r0, r1movne r10, #20bne testfail@ check if there are more bytes in rx bufferb 1btestfail:ldr r11, AdrTEST_STATUSstr r10, [r11]b testfailtestpass:ldr r11, AdrTEST_STATUSmov r10, #17str r10, [r11]b testpass@ ------------------------------------------@ ------------------------------------------/* Write 17 to this address to generate a Test Passed message */AdrTEST_STATUS: .word ADR_AMBER_TEST_STATUSAdrTEST_IRQ_TIMER: .word ADR_AMBER_TEST_IRQ_TIMERAdrTEST_RANDOM_NUM: .word ADR_AMBER_TEST_RANDOM_NUMAdrTEST_UART_CONTROL: .word ADR_AMBER_TEST_UART_CONTROLAdrTEST_UART_STATUS: .word ADR_AMBER_TEST_UART_STATUSAdrTEST_UART_TXD: .word ADR_AMBER_TEST_UART_TXDAdrIC_IRQ0_ENABLESET: .word ADR_AMBER_IC_IRQ0_ENABLESETAdrUART0LCRH: .word ADR_AMBER_UART0_LCRHAdrUART0CR: .word ADR_AMBER_UART0_CRAdrUART0DR: .word ADR_AMBER_UART0_DRAdrUART0FR: .word ADR_AMBER_UART0_FRMessage: .ascii "\nThis message is brought to you by UART0\nIsnt that cool\nThats all folks\n"EndMessage: .word 0