Subversion Repositories bustap-jtag

1.0 Code base as published on EDN.

2.0 Code base for 2.x development. Added pipelined bus access capture support.

2.1 Added new features: 1. Multiple address filter selection; 2. Read access capture support; 3. Full trigger condition support; 4. Updated GUI; 5. Updated wrapper example with glitch filter and stable address/data capture.

2.2 Added new features: 1. Multiple capture filter selection in the Tk GUI. 2. Read transaction capture. 3. Adjustable pre-trigger capture. 4. Capture content with transaction timing information. 

2.3 Added support for Xilinx Devices with Chipscope VIO.

2.4 Added support for Xilinx XPS env, as an AXI bus monitor.

2.5 Modified the address filter entry, to support 32bit address and data.