OpenCores
URL https://opencores.org/ocsvn/mips_16/mips_16/trunk

Subversion Repositories mips_16

[/] [mips_16/] [trunk/] [doc/] [instruction_set.txt] - Rev 5

Compare with Previous | Blame | View Log

My mips_16 instrction set:

R-type:
                |       15:12           11:9    8:6             5:3     2:0
        -------------------------------------------
        NOP     |       0000            rd(0)   rs1(0)  rs2(0)000 
        ADD     |       0001            rd              rs1             rs2     000 
        SUB     |       0010            rd              rs1             rs2     000 
        AND     |       0011            rd              rs1             rs2     000 
        OR      |       0100            rd              rs1             rs2     000 
        XOR     |       0101            rd              rs1             rs2     000 
        SL      |       0110            rd              rs1             rs2     000 
        SR      |       0111            rd              rs1             rs2     000 
        SRU     |       1000            rd              rs1             rs2     000 
        
        
I-type: 
                |       15:12           11:9    8:6             5:3     2:0
        -------------------------------------------
        ADDI|   1001            rd              rs1     imm 
        LD      |       1010            rd              base    offset 
        ST      |       1011            rd(rs)  base    offset 
        BZ      |       1100            000             rs1             offset 
//      BGT     |       1100            001             rs1     offset 
//      BLE     |       1100            010             rs1     offset 
        

J-type:
                |       15:12           11:9    8:6             5:3     2:0
        -------------------------------------------


        
NOTE:
 Immediate number field is 6-bit long, so in ADDI/LD/ST/BZ, -32<= imm(offset) <32

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.