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[/] [pcie_sg_dma/] [branches/] [Virtex6/] [ML605_ISE12.3/] [iseconfig/] [v6pcie.projectmgr] - Rev 11
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<?xml version='1.0' encoding='utf-8'?><!--This is an ISE project configuration file.--><!--It holds project specific layout data for the projectmgr plugin.--><!--Copyright (c) 1995-2009 Xilinx, Inc. All rights reserved.--><Project version="2" owner="projectmgr" name="v6pcie" ><!--This is an ISE project configuration file.--><ItemView engineview="SynthesisOnly" guiview="Source" compilemode="AutoCompile" ><ClosedNodes><ClosedNodesVersion>2</ClosedNodesVersion><ClosedNode>/PCIe_UserLogic_03 - structural C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|MyUserLogicMultiTiming|PCIe_UserLogic_03.vhd</ClosedNode><ClosedNode>/PCIe_UserLogic_04 - structural C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|MyUserLogicMultiTiming_New|PCIe_UserLogic_04.vhd</ClosedNode><ClosedNode>/PCIe_UserLogic_05 - structural C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|MyUserLogic|PCIe_UserLogic_05.vhd</ClosedNode><ClosedNode>/PCIe_UserLogic_06 - structural C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|MyUserLogic06|PCIe_UserLogic_06.vhd</ClosedNode><ClosedNode>/Unassigned User Library Modules</ClosedNode><ClosedNode>/abb_dgen - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_Clean|abb_dgen.vhd</ClosedNode><ClosedNode>/bram_DDRs_Control - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_OpenCores|bram_DDRs_Control_Loopback.vhd</ClosedNode><ClosedNode>/bram_DDRs_loopback - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_OpenCores|bram_DDRs_Control_Loopback.vhd</ClosedNode><ClosedNode>/class_ctl - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_Clean|class_ctl.vhd</ClosedNode><ClosedNode>/class_daq - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_Clean|class_daq.vhd</ClosedNode><ClosedNode>/class_dlm - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_Clean|class_dlm.vhd</ClosedNode><ClosedNode>/pcie_2_0_v6 C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6_pcie_v1_3|source|pcie_2_0_v6.v</ClosedNode><ClosedNode>/pcie_userlogic_01 - structural C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_Clean|MyUserLogic|pcie_userlogic_01.vhd/chipscope - xlchipscope - behavior</ClosedNode><ClosedNode>/pcie_userlogic_01 - structural C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_Clean|MyUserLogic|pcie_userlogic_01.vhd/rise_detector_3_513dad66ef - rise_detector_3_entity_513dad66ef - structural</ClosedNode><ClosedNode>/pcie_userlogic_01_cw - structural C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_Clean|MyUserLogic|pcie_userlogic_01_cw.vhd/default_clock_driver_x0 - default_clock_driver - structural</ClosedNode><ClosedNode>/pcie_userlogic_01_cw - structural C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_Clean|MyUserLogic|pcie_userlogic_01_cw.vhd/pcie_userlogic_01_x0 - pcie_userlogic_01 - structural</ClosedNode><ClosedNode>/pcie_userlogic_02_cw - structural C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_Clean|MyUserLogic|pcie_userlogic_02_cw.vhd</ClosedNode><ClosedNode>/pcie_userlogic_02_cw - structural C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|MyUserLogic|pcie_userlogic_02_cw.vhd/default_clock_driver_x0 - default_clock_driver - structural</ClosedNode><ClosedNode>/pcie_userlogic_02_cw - structural C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|MyUserLogic|pcie_userlogic_02_cw.vhd/pcie_userlogic_02_x0 - pcie_userlogic_02 - structural</ClosedNode><ClosedNode>/pcie_userlogic_02_mcw - structural C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|MyUserLogic|pcie_userlogic_02_mcw.vhd/pcie_userlogic_02_x0 - pcie_userlogic_02 - structural</ClosedNode><ClosedNode>/protocol_IF - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_Clean|protocol_if.vhd</ClosedNode><ClosedNode>/synth_reg - structural C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_Clean|MyUserLogic|pcie_userlogic_02.vhd</ClosedNode><ClosedNode>/synth_reg - structural C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|MyUserLogic|pcie_userlogic_02.vhd</ClosedNode><ClosedNode>/synth_reg_w_init - structural C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|MyUserLogic06|PCIe_UserLogic_06.vhd</ClosedNode><ClosedNode>/synth_reg_w_init - structural C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|MyUserLogic06|PCIe_UserLogic_07.vhd</ClosedNode><ClosedNode>/synth_reg_w_init - structural C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|MyUserLogic|pcie_userlogic_02.vhd</ClosedNode><ClosedNode>/tf64_pcie_trn C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_Clean|MySim|tf64_pcie_trn.v</ClosedNode><ClosedNode>/v6_pcie_v1_3 C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6_pcie_v1_3|source|v6_pcie_v1_3.v</ClosedNode><ClosedNode>/v6_pcie_v1_3 C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6_pcie_v1_3|source|v6_pcie_v1_3.v/pcie_2_0_i - pcie_2_0_v6/pcie_bram_i - pcie_bram_top_v6</ClosedNode><ClosedNode>/v6_pcie_v1_3 C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6_pcie_v1_3|source|v6_pcie_v1_3.v/pcie_2_0_i - pcie_2_0_v6/pcie_gt_i - pcie_gtx_v6</ClosedNode><ClosedNode>/v6_pcie_v1_3 C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6_pcie_v1_3|source|v6_pcie_v1_3.v/pcie_2_0_i - pcie_2_0_v6/pcie_pipe_i - pcie_pipe_v6</ClosedNode><ClosedNode>/v6_pcie_v1_3x8 C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_Clean|v6_pcie_v1_3|source|v6_pcie_v1_3x8.v</ClosedNode><ClosedNode>/v6_pcie_v1_6 - v6_pcie C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|ipcore_dir|v6_pcie_v1_6|source|v6_pcie_v1_6.vhd</ClosedNode><ClosedNode>/v6_pcie_v1_6 - v6_pcie C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|ipcore_dir|v6_pcie_v1_6|source|v6_pcie_v1_6.vhd/pcie_2_0_i - pcie_2_0_v6 - v6_pcie/pcie_bram_i - pcie_bram_top_v6 - v6_pcie</ClosedNode><ClosedNode>/v6_pcie_v1_6 - v6_pcie C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|ipcore_dir|v6_pcie_v1_6|source|v6_pcie_v1_6.vhd/pcie_2_0_i - pcie_2_0_v6 - v6_pcie/pcie_gt_i - pcie_gtx_v6 - v6_pcie/gtx_v6_i - gtx_wrapper_v6 - v6_pcie</ClosedNode><ClosedNode>/v6_pcie_v1_6 - v6_pcie C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|ipcore_dir|v6_pcie_v1_6|source|v6_pcie_v1_6.vhd/pcie_2_0_i - pcie_2_0_v6 - v6_pcie/pcie_pipe_i - pcie_pipe_v6 - v6_pcie</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_Clean|v6eb_pcie.vhd/DDRs_ctrl_module - bram_DDRs_Control - Behavioral</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_Clean|v6eb_pcie.vhd/my_pcie_userlogic_01_cw - pcie_userlogic_01_cw - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_Clean|v6eb_pcie.vhd/pcieCore - v6_pcie_v1_3</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_Clean|v6eb_pcie.vhd/queue_buffer0 - eb_wrapper - Behavioral</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_Clean|v6eb_pcie.vhd/theTlpControl - tlpControl - Behavioral/rx_Itf - rx_Transact - Behavioral</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_OpenCores|v6eb_pcie.vhd/DDRs_ctrl_module - bram_DDRs_Control - Behavioral</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_OpenCores|v6eb_pcie.vhd/DDRs_ctrl_module - bram_DDRs_Control_loopback - Behavioral</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_OpenCores|v6eb_pcie.vhd/pcieCore - v6_pcie_v1_6 - v6_pcie</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_OpenCores|v6eb_pcie.vhd/pcie_userlogic_07_x0 - PCIe_UserLogic_07 - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_OpenCores|v6eb_pcie.vhd/queue_buffer0 - eb_wrapper - Behavioral</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_OpenCores|v6eb_pcie.vhd/queue_buffer0 - eb_wrapper_loopback - Behavioral</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_OpenCores|v6eb_pcie.vhd/theTlpControl - tlpControl - Behavioral</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_OpenCores|v6eb_pcie.vhd/theTlpControl - tlpControl - Behavioral/rx_Itf - rx_Transact - Behavioral</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_OpenCores|v6eb_pcie.vhd/theTlpControl - tlpControl - Behavioral/rx_Itf - rx_Transact - Behavioral/CplD_Channel - rx_CplD_Transact - Behavioral</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_OpenCores|v6eb_pcie.vhd/theTlpControl - tlpControl - Behavioral/rx_Itf - rx_Transact - Behavioral/Downstream_DMA_Engine - dsDMA_Transact - Behavioral</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_OpenCores|v6eb_pcie.vhd/theTlpControl - tlpControl - Behavioral/rx_Itf - rx_Transact - Behavioral/MRd_Channel - rx_MRd_Transact - Behavioral</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_OpenCores|v6eb_pcie.vhd/theTlpControl - tlpControl - Behavioral/rx_Itf - rx_Transact - Behavioral/Upstream_DMA_Engine - usDMA_Transact - Behavioral</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_OpenCores|v6eb_pcie.vhd/theTlpControl - tlpControl - Behavioral/tx_Itf - tx_Transact - Behavioral</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_Original|v6eb_pcie.vhd/ABB_DCB_Interface0 - protocol_IF - Behavioral</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_Original|v6eb_pcie.vhd/DDRs_ctrl_module - bram_DDRs_Control - Behavioral</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_Original|v6eb_pcie.vhd/event_buffer0 - eb_wrapper - Behavioral</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_Original|v6eb_pcie.vhd/my_pcie_userlogic_01_cw - pcie_userlogic_01_cw - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_Original|v6eb_pcie.vhd/pcieCore - v6_pcie_v1_3</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_Original|v6eb_pcie.vhd/pcieCore - v6_pcie_v1_3x8</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_Original|v6eb_pcie.vhd/theTlpControl - tlpControl - Behavioral</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/DDRs_ctrl_module - bram_DDRs_Control - Behavioral</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcieCore - v6_pcie_v1_3</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcieCore - v6_pcie_v1_3/pcie_2_0_i - pcie_2_0_v6</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcieCore - v6_pcie_v1_3/pcie_2_0_i - pcie_2_0_v6/pcie_bram_i - pcie_bram_top_v6</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcieCore - v6_pcie_v1_3/pcie_2_0_i - pcie_2_0_v6/pcie_pipe_i - pcie_pipe_v6</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcieCore - v6_pcie_v1_6 - v6_pcie</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcieCore - v6_pcie_v1_6 - v6_pcie/pcie_2_0_i - pcie_2_0_v6 - v6_pcie/pcie_bram_i - pcie_bram_top_v6 - v6_pcie</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcieCore - v6_pcie_v1_6 - v6_pcie/pcie_2_0_i - pcie_2_0_v6 - v6_pcie/pcie_gt_i - pcie_gtx_v6 - v6_pcie/gtx_v6_i - gtx_wrapper_v6 - v6_pcie</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcieCore - v6_pcie_v1_6 - v6_pcie/pcie_2_0_i - pcie_2_0_v6 - v6_pcie/pcie_pipe_i - pcie_pipe_v6 - v6_pcie</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_02_x0 - pcie_userlogic_02_mcw - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_03_x0 - PCIe_UserLogic_03 - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_03_x0 - PCIe_UserLogic_03 - structural/debug1i - synth_reg_w_init - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_03_x0 - PCIe_UserLogic_03 - structural/debug2i - synth_reg_w_init - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_03_x0 - PCIe_UserLogic_03 - structural/debug3i - synth_reg_w_init - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_03_x0 - PCIe_UserLogic_03 - structural/register01rd - synth_reg_w_init - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_03_x0 - PCIe_UserLogic_03 - structural/register01rv - synth_reg_w_init - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_03_x0 - PCIe_UserLogic_03 - structural/register01td - synth_reg_w_init - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_03_x0 - PCIe_UserLogic_03 - structural/register01tv - synth_reg_w_init - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_03_x0 - PCIe_UserLogic_03 - structural/register02rd - synth_reg_w_init - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_03_x0 - PCIe_UserLogic_03 - structural/register02rv - synth_reg_w_init - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_03_x0 - PCIe_UserLogic_03 - structural/register02td - synth_reg_w_init - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_03_x0 - PCIe_UserLogic_03 - structural/register02tv - synth_reg_w_init - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_03_x0 - PCIe_UserLogic_03 - structural/register03rd - synth_reg_w_init - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_03_x0 - PCIe_UserLogic_03 - structural/register03rv - synth_reg_w_init - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_03_x0 - PCIe_UserLogic_03 - structural/register03td - synth_reg_w_init - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_03_x0 - PCIe_UserLogic_03 - structural/register03tv - synth_reg_w_init - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_04_x0 - PCIe_UserLogic_04 - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_04_x0 - PCIe_UserLogic_05 - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_06_x0 - PCIe_UserLogic_06 - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_06_x0 - PCIe_UserLogic_06 - structural/DMA_Host2Board_Busy_x0 - synth_reg_w_init - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_06_x0 - PCIe_UserLogic_06 - structural/DMA_Host2Board_Done_x0 - synth_reg_w_init - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_06_x0 - PCIe_UserLogic_06 - structural/debug1i - synth_reg_w_init - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_06_x0 - PCIe_UserLogic_06 - structural/debug2i - synth_reg_w_init - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_06_x0 - PCIe_UserLogic_06 - structural/debug3i - synth_reg_w_init - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_06_x0 - PCIe_UserLogic_06 - structural/debug4i - synth_reg_w_init - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_06_x0 - PCIe_UserLogic_06 - structural/register01rd - synth_reg_w_init - structural</ClosedNode><ClosedNode>/v6pcieDMA - Behavioral C:|Temp|Xilinx PCI Express|pcie-v6-ml605_ISE12_User|v6eb_pcie.vhd/pcie_userlogic_06_x0 - PCIe_UserLogic_06 - structural/register01rv - synth_reg_w_init - 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