OpenCores
URL https://opencores.org/ocsvn/present/present/trunk

Subversion Repositories present

[/] [present/] [trunk/] [DecodeTesting/] [sim/] [rtl_sim/] [bin/] [ShiftRegTB_beh.prj] - Rev 7

Compare with Previous | Blame | View Log

vhdl work "../../../rtl/vhdl/ShiftReg.vhd"
vhdl work "../../../bench/vhdl/ShiftRegTB.vhd"

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.