OpenCores
URL https://opencores.org/ocsvn/riscv_vhdl/riscv_vhdl/trunk

Subversion Repositories riscv_vhdl

[/] [riscv_vhdl/] [trunk/] [debugger/] [targets/] [sysc_river_gui.json] - Rev 2

Go to most recent revision | Compare with Previous | Blame | View Log

{
  'GlobalSettings':{
    'SimEnable':true,
    'GUI':true,
    'ScriptFile':'',
    'Description':'This configuration creates SystemC instance of CPU RIVER instead functional model'
  },
  'Services':[
    {'Class':'GuiPluginClass','Instances':[
                {'Name':'gui0','Attr':[
                ['LogLevel',4],
                ['WidgetsConfig',{
                  'Serial':'port1',
                  'AutoComplete':'autocmd0',
                  'SocInfo':'info0',
                  'PollingMs':250
                }],
                ['SocInfo','info0'],
                ['CommandExecutor','cmdexec0']
                ]}]},
    {'Class':'EdclServiceClass','Instances':[
          {'Name':'edcltap','Attr':[
                ['LogLevel',1],
                ['Transport','udpedcl'],
                ['seq_cnt',0]]}]},
    {'Class':'UdpServiceClass','Instances':[
          {'Name':'udpboard','Attr':[
                ['LogLevel',1],
                ['Timeout',0x190]]},
          {'Name':'udpedcl','Attr':[
                ['LogLevel',1],
                ['Timeout',0x3e8],
                ['HostIP','192.168.0.53'],
                ['BoardIP','192.168.0.51']]}]},
    {'Class':'ComPortServiceClass','Instances':[
          {'Name':'port1','Attr':[
                ['LogLevel',2],
                ['Enable',true],
                ['UartSim','uart0'],
                ['ComPortName','COM3'],
                ['ComPortSpeed',115200]]}]},
    {'Class':'ElfReaderServiceClass','Instances':[
          {'Name':'loader0','Attr':[
                ['LogLevel',4]]}]},
    {'Class':'ConsoleServiceClass','Instances':[
          {'Name':'console0','Attr':[
                ['LogLevel',4],
                ['Enable',true],
                ['StepQueue','core0'],
                ['AutoComplete','autocmd0'],
                ['CommandExecutor','cmdexec0'],
                ['DefaultLogFile','default.log'],
                ['Signals','gpio0'],
                ['InputPort','port1']]}]},
    {'Class':'AutoCompleterClass','Instances':[
          {'Name':'autocmd0','Attr':[
                ['LogLevel',4],
                ['SocInfo','info0']
                ['HistorySize',64],
                ['History',[
                     'csr MCPUID',
                     'csr MTIME',
                     'read 0xfffff004 128',
                     'loadelf helloworld'
                     ]]
                ]}]},
    {'Class':'CmdExecutorClass','Instances':[
          {'Name':'cmdexec0','Attr':[
                ['LogLevel',4],
                ['Tap','edcltap'],
                ['SocInfo','info0']
                ]}]},
    {'Class':'SocInfoClass','Instances':[
          {'Name':'info0','Attr':[
                ['LogLevel',4],
                ['PnpBaseAddress',0xFFFFF000],
                ['GpioBaseAddress',0x80000000],
                ['DsuBaseAddress',0x80080000],
                ['ListRegs',[['zero',8,0],['ra',8,1],['sp',8,2],['gp',8,3],
                            ['tp',8,4],['t0',8,5],['t1',8,6],['t2',8,7],
                            ['s0',8,8],['s1',8,9],['a0',8,10],['a1',8,11],
                            ['a2',8,12],['a3',8,13],['a4',8,14],['a5',8,15],
                            ['a6',8,16],['a7',8,17],['s2',8,18],['s3',8,19],
                            ['s4',8,20],['s5',8,21],['s6',8,22],['s7',8,23],
                            ['s8',8,24],['s9',8,25],['s10',8,26],['s11',8,27],
                            ['t3',8,28],['t4',8,29],['t5',8,30],['t6',8,31],
                            ['pc',8,32,'Instruction Pointer'],
                            ['npc',8,33,'Next IP']]],
                ['ListCSR',[
                    ['MISA',8,0xf10,'Architecture and supported set of instructions'],
                    ['MVENDORID',8,0xf11,'Vecndor ID'],
                    ['MARCHID',8,0xf12,'Architecture ID'],
                    ['MIMPLEMENTATIONID',8,0xf13,'Implementation ID'],
                    ['MHARTID',8,0xf14,'Thread ID'],
                    ['MTIME',8,0x701,'Machine wall-clock time.'],
                    ['MSTATUS',8,0x300,'Machine mode status register.'],
                    ['MIE',8,0x304,'Machine interrupt enable register.'],
                    ['MTVEC',8,0x305,'Machine mode trap vector register.'],
                    ['MSCRATCH',8,0x340,'Machine mode scratch register.'],
                    ['MEPC',8,0x341,'Machine exception program counter'],
                    ['MCAUSE',8,0x342,'Machine cause trap register'],
                    ['MBADADDR',8,0x343,'Machine mode bad address register'],
                    ['MIP',8,0x344,'Machine mode interrupt pending bits register']
                    ]]]}]},
    {'Class':'SimplePluginClass','Instances':[
          {'Name':'example0','Attr':[
                ['LogLevel',4],
                ['attr1','This is test attr value']]}]},
    {'Class':'SourceServiceClass','Instances':[
          {'Name':'src0','Attr':[
                ['LogLevel',4]]}]},
    {'Class':'GrethClass','Instances':[
          {'Name':'greth0','Attr':[
                ['LogLevel',1],
                ['BaseAddress',0x80040000],
                ['Length',0x40000],
                ['IrqLine',2],
                ['IrqControl','irqctrl0'],
                ['IP',0x55667788],
                ['MAC',0xfeedface00],
                ['Bus','axi0'],
                ['Transport','udpboard']
                ]}]},
    {'Class':'CpuRiscV_RTLClass','Instances':[
          {'Name':'core0','Attr':[
                ['LogLevel',4],
                ['Bus','axi0'],
                ['GenerateRef',false,'Generate Registers/Memory access trace file to compare it with functional model'],
                ['InVcdFile','','Non empty string enables generation of stimulus VCD file'],
                ['OutVcdFile','','Non empty string enables VCD file with reference signals'],
                ['FreqHz',60000000]
                ]}]},
    {'Class':'MemorySimClass','Instances':[
          {'Name':'bootrom0','Attr':[
                ['LogLevel',1],
                ['InitFile','../../../rocket_soc/fw_images/bootimage.hex'],
                ['ReadOnly',true],
                ['BaseAddress',0x0],
                ['Length',8192]
                ]}]},
    {'Class':'MemorySimClass','Instances':[
          {'Name':'fwimage0','Attr':[
                ['LogLevel',1],
                ['InitFile','../../../rocket_soc/fw_images/fwimage.hex'],
                ['ReadOnly',true],
                ['BaseAddress',0x00100000],
                ['Length',0x40000]
                ]}]},
    {'Class':'MemorySimClass','Instances':[
          {'Name':'sram0','Attr':[
                ['LogLevel',1],
                ['InitFile','../../../rocket_soc/fw_images/fwimage.hex'],
                ['ReadOnly',false],
                ['BaseAddress',0x10000000],
                ['Length',0x80000]
                ]}]},
    {'Class':'GPIOClass','Instances':[
          {'Name':'gpio0','Attr':[
                ['LogLevel',3],
                ['BaseAddress',0x80000000],
                ['Length',4096],
                ['DIP',0x1]
                ]}]},
    {'Class':'UARTClass','Instances':[
          {'Name':'uart0','Attr':[
                ['LogLevel',1],
                ['BaseAddress',0x80001000],
                ['Length',4096],
                ['IrqLine',1],
                ['IrqControl','irqctrl0']
                ]}]},
    {'Class':'IrqControllerClass','Instances':[
          {'Name':'irqctrl0','Attr':[
                ['LogLevel',1],
                ['BaseAddress',0x80002000],
                ['Length',4096],
                ['CPU','core0'],
                ['IrqTotal',4],
                ['CSR_MIPI',0x783]
                ]}]},
    {'Class':'DSUClass','Instances':[
          {'Name':'dsu0','Attr':[
                ['LogLevel',1],
                ['BaseAddress',0x80080000],
                ['Length',0x20000],
                ['CPU','core0'],
                ['Bus','axi0']
                ]}]},
    {'Class':'GNSSStubClass','Instances':[
          {'Name':'gnss0','Attr':[
                ['LogLevel',1],
                ['BaseAddress',0x80003000],
                ['Length',4096],
                ['IrqLine',5],
                ['IrqControl','irqctrl0'],
                ['ClkSource','core0']
                ]}]},
    {'Class':'RfControllerClass','Instances':[
          {'Name':'rfctrl0','Attr':[
                ['LogLevel',1],
                ['BaseAddress',0x80004000],
                ['Length',4096]
                ]}]},
    {'Class':'GPTimersClass','Instances':[
          {'Name':'gptmr0','Attr':[
                ['LogLevel',1],
                ['BaseAddress',0x80005000],
                ['Length',4096],
                ['IrqLine',3],
                ['IrqControl','irqctrl0'],
                ['ClkSource','core0']
                ]}]},
    {'Class':'FseV2Class','Instances':[
          {'Name':'fsegps0','Attr':[
                ['LogLevel',1],
                ['BaseAddress',0x80008000],
                ['Length',4096]
                ]}]},
    {'Class':'PNPClass','Instances':[
          {'Name':'pnp0','Attr':[
                ['LogLevel',4],
                ['BaseAddress',0xfffff000],
                ['Length',4096],
                ['Tech',0],
                ['AdcDetector',0xff]
                ]}]},
    {'Class':'BusClass','Instances':[
          {'Name':'axi0','Attr':[
                ['LogLevel',3],
                ['MapList',['bootrom0','fwimage0','sram0','gpio0',
                        'uart0','irqctrl0','gnss0','gptmr0',
                        'pnp0','dsu0','greth0','rfctrl0','fsegps0']]
                ]}]},
    {'Class':'BoardSimClass','Instances':[
          {'Name':'boardsim','Attr':[
                ['LogLevel',1]
                ]}]}
  ]
}

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.