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[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [nfdsubs.cgs] - Rev 26
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# frv testcase for nfdsubs $FRi,$FRj,$FRk# mach: fr500 fr550 frv.include "testutils.inc"float_constantsstartload_float_constantsload_float_constants1.global nfdsubsnfdsubs:nfdsubs fr0,fr16,fr2test_fr_fr fr2,fr0test_fr_fr fr3,fr0test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr4,fr16,fr2test_fr_fr fr2,fr4test_fr_fr fr3,fr4test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr8,fr16,fr2test_fr_fr fr2,fr8test_fr_fr fr3,fr8test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr12,fr16,fr2test_fr_fr fr2,fr12test_fr_fr fr3,fr12test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr16,fr16,fr2test_fr_fr fr2,fr16test_fr_fr fr2,fr20test_fr_fr fr3,fr16test_fr_fr fr3,fr20test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr20,fr16,fr2test_fr_fr fr2,fr16test_fr_fr fr2,fr20test_fr_fr fr3,fr16test_fr_fr fr3,fr20test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr24,fr16,fr2test_fr_fr fr2,fr24test_fr_fr fr3,fr24test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr28,fr16,fr2test_fr_fr fr2,fr28test_fr_fr fr3,fr28test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr32,fr16,fr2test_fr_fr fr2,fr32test_fr_fr fr3,fr32test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr36,fr16,fr2test_fr_fr fr2,fr36test_fr_fr fr3,fr36test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr40,fr16,fr2test_fr_fr fr2,fr40test_fr_fr fr3,fr40test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr44,fr16,fr2test_fr_fr fr2,fr44test_fr_fr fr3,fr44test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr48,fr16,fr2test_fr_fr fr2,fr48test_fr_fr fr3,fr48test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr52,fr16,fr2test_fr_fr fr2,fr52test_fr_fr fr3,fr52test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr0,fr20,fr2test_fr_fr fr2,fr0test_fr_fr fr3,fr0test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr4,fr20,fr2test_fr_fr fr2,fr4test_fr_fr fr3,fr4test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr8,fr20,fr2test_fr_fr fr2,fr8test_fr_fr fr3,fr8test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr12,fr20,fr2test_fr_fr fr2,fr12test_fr_fr fr3,fr12test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr16,fr20,fr2test_fr_fr fr2,fr16test_fr_fr fr2,fr20test_fr_fr fr3,fr16test_fr_fr fr3,fr20test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr20,fr20,fr2test_fr_fr fr2,fr16test_fr_fr fr2,fr20test_fr_fr fr3,fr16test_fr_fr fr3,fr20test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr24,fr20,fr2test_fr_fr fr2,fr24test_fr_fr fr3,fr24test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr28,fr20,fr2test_fr_fr fr2,fr28test_fr_fr fr3,fr28test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr32,fr20,fr2test_fr_fr fr2,fr32test_fr_fr fr3,fr32test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr36,fr20,fr2test_fr_fr fr2,fr36test_fr_fr fr3,fr36test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr40,fr20,fr2test_fr_fr fr2,fr40test_fr_fr fr3,fr40test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr44,fr20,fr2test_fr_fr fr2,fr44test_fr_fr fr3,fr44test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr48,fr20,fr2test_fr_fr fr2,fr48test_fr_fr fr3,fr48test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr52,fr20,fr2test_fr_fr fr2,fr52test_fr_fr fr3,fr52test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr32,fr36,fr2test_fr_fr fr2,fr8test_fr_fr fr3,fr8test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr44,fr40,fr2test_fr_fr fr2,fr36test_fr_fr fr3,fr36test_spr_immed 0,fner1test_spr_immed 0,fner0; try to cause exceptionsnfdsubs fr4,fr28,fr2; test_fr_fr fr2,fr44; test_fr_fr fr3,fr44test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr0,fr28,fr2; test_fr_fr fr2,fr44; test_fr_fr fr3,fr44test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr56,fr28,fr2; test_fr_fr fr2,fr44; test_fr_fr fr3,fr44test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsubs fr60,fr28,fr2; test_fr_fr fr2,fr44; test_fr_fr fr3,fr44test_spr_immed 0xc,fner1test_spr_immed 0,fner0pass