OpenCores
URL https://opencores.org/ocsvn/scarts/scarts/trunk

Subversion Repositories scarts

[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [sh64/] [compact/] [add.cgs] - Rev 26

Compare with Previous | Blame | View Log

# sh testcase for add $rm, $rn -*- Asm -*-
# mach: all
# as: -isa=shcompact
# ld: -m shelf32

        .include "compact/testutils.inc"

        start
init:
        # Initialise some registers with values which help us to verify
        # that the correct source registers are used by the ADD instruction.
        mov #0, r0
        mov #1, r1
        mov #2, r2
        mov #3, r3
        mov #5, r5
        mov #15, r15

add:    
        # 0 + 0 = 0.
        add r0, r0
        assert r0, #0

        # 0 + 1 = 1.
        add r0, r1
        assert r1, #1

        # 1 + 2 = 3.
        add r1, r2
        assert r2, #3

        # 3 + 5 = 8.
        add r3, r5
        assert r5, #8
        
        # 8 + 8 = 16.
        add r5, r5
        assert r5, #16

        # 15 + 1 = 16.
        add r15, r1
        assert r1, #16

neg:
        mov #1, r0
        neg r0, r0
        mov #2, r1
        add r0, r1
        assert r1, #1

okay:   
        pass

wrong:
        fail

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.