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\section{Introduction}
\label{sec:introduction}
 
    This document descripes the multimedia card (MMC) / secure digital (SD) card controller ip core - \textit{Wishbone SD Card Controller IP Core}.
 
    \subsection{Purpose of the IP core}
    \label{sec:purpose}
 
    The \textit{Wishbone SD Card Controller IP Core} is MMC/SD communication controller designed to be used in System-on-Chip (img. \ref{img:ip_core}).
    IP core provides simple interface for any MCU with Wishbone bus. The communication between the MMC/SD card controller and MMC/SD card 
    is performed according to the MMC/SD protocol.
 
    \begin{figure}[H]
        \centering
        \includegraphics[width=11cm]{../bin/ip_core.png}
        % ip_core.png: 384x469 pixel, 96dpi, 10.16x12.41 cm, bb=
        \caption{SoC with SD Card IP core}
        \label{img:ip_core}
    \end{figure}
 
    \subsection{Features}
    \label{sec:fetures}
    The MMC/SD card controller provides following features:
 
    \begin{itemize}
     \item 1- or 4-bit MMC/SD mode (does not support SPI mode),
     \item 32-bit Wishbone interface,
     \item DMA engine for data transfers,
     \item Interrupt generation on completion of data and command transactions,
     \item Configurable data transfer block size,
     \item Support for any command code (including multiple data block tranfser),
     \item Support for R1, R1b, R2(136-bit), R3, R6 and R7 responses.
    \end{itemize}
 

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