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https://opencores.org/ocsvn/socgen/socgen/trunk
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[/] [socgen/] [trunk/] [common/] [opencores.org/] [Testbench/] [bfms/] [clock_gen/] [sim/] [testbenches/] [xml/] [clock_gen_bfm.design.xml] - Rev 135
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<?xml version="1.0" encoding="UTF-8"?>
<!--
// //
// Author : John Eaton Ouabache Designworks //
// //
// Copyright (C) 2010 Authors and OPENCORES.ORG //
// //
// This source file may be used and distributed without //
// restriction provided that this copyright statement is not //
// removed from the file and that any derivative work contains //
// the original copyright notice and the associated disclaimer. //
// //
// This source file is free software; you can redistribute it //
// and/or modify it under the terms of the GNU Lesser General //
// Public License as published by the Free Software Foundation; //
// either version 2.1 of the License, or (at your option) any //
// later version. //
// //
// This source is distributed in the hope that it will be //
// useful, but WITHOUT ANY WARRANTY; without even the implied //
// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //
// PURPOSE. See the GNU Lesser General Public License for more //
// details. //
// //
// You should have received a copy of the GNU Lesser General //
// Public License along with this source; if not, download it //
// from http://www.opencores.org/lgpl.shtml //
// //
-->
<ipxact:design
xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">
<ipxact:vendor>opencores.org</ipxact:vendor>
<ipxact:library>Testbench</ipxact:library>
<ipxact:name>clock_gen</ipxact:name>
<ipxact:version>bfm.design</ipxact:version>
<ipxact:vendorExtensions>
<socgen:nodes>
<socgen:node>
<ipxact:name>STOP</ipxact:name>
<ipxact:typeName>wire</ipxact:typeName>
</socgen:node>
<socgen:node>
<ipxact:name>BAD</ipxact:name>
<ipxact:typeName>wire</ipxact:typeName>
</socgen:node>
</socgen:nodes>
</ipxact:vendorExtensions>
<ipxact:adHocConnections>
<ipxact:adHocConnection>
<ipxact:name>clk</ipxact:name>
<ipxact:externalPortReference portRef="clk"/>
<ipxact:internalPortReference componentRef="cg" portRef="clk"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>reset</ipxact:name>
<ipxact:externalPortReference portRef="reset"/>
<ipxact:internalPortReference componentRef="cg" portRef="reset"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>START</ipxact:name>
<ipxact:externalPortReference portRef="START"/>
<ipxact:internalPortReference componentRef="cg" portRef="START"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>FAIL</ipxact:name>
<ipxact:externalPortReference portRef="FAIL"/>
<ipxact:internalPortReference componentRef="cg" portRef="FAIL"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>FINISH</ipxact:name>
<ipxact:externalPortReference portRef="FINISH"/>
<ipxact:internalPortReference componentRef="cg" portRef="FINISH"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>STOP</ipxact:name>
<ipxact:internalPortReference componentRef="cg" portRef="STOP"/>
</ipxact:adHocConnection>
<ipxact:adHocConnection>
<ipxact:name>BAD</ipxact:name>
<ipxact:internalPortReference componentRef="cg" portRef="BAD"/>
</ipxact:adHocConnection>
</ipxact:adHocConnections>
<ipxact:componentInstances>
<ipxact:componentInstance>
<ipxact:instanceName>cg</ipxact:instanceName>
<ipxact:componentRef vendor="opencores.org" library="Testbench" name="clock_gen" version="def" />
</ipxact:componentInstance>
</ipxact:componentInstances>
</ipxact:design>