Subversion Repositories spimaster

../rtl/spiMaster.v
../rtl/sm_dpMem_dc.v
../rtl/sm_fifoRTL.v
../rtl/sm_RxFifoBI.v
../rtl/sm_TxFifoBI.v
../rtl/sm_RxFifo.v
../rtl/sm_TxFifo.v
../rtl/initSD.v
../rtl/readWriteSPIWireData.v
../rtl/readWriteSDBlock.v
../rtl/sendCmd.v
../rtl/spiCtrl.v
../rtl/spiTxRxData.v
../rtl/spiMasterWishBoneBI.v
../rtl/ctrlStsRegBI.v
../model/wb_master_model.v
../model/sdModel.v
../bench/testHarness.v
../bench/testCase0.v
+incdir+../rtl
+define+SIM_COMPILE