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https://opencores.org/ocsvn/vhdl_cpu_emulator/vhdl_cpu_emulator/trunk
Subversion Repositories vhdl_cpu_emulator
[/] [vhdl_cpu_emulator/] [trunk/] [thr_rx_uart1.txt] - Rev 3
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#wait for interrupt thread to do initialization
PARAMETERS STRING outfile
WAIT 30 ns
CLEAR outfile
WHILE
WAIT 3 us
#check if data received interrupt
vector8 tmp = int1shadow
tmp &= 00000010
IF tmp == 00000010
int1shadow &= 11111101
READ 00011111 tmp
PRINT outfile tmp
IF_END
WHILE_END