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[/] [w11/] [tags/] [w11a_V0.74/] [rtl/] [make_ise/] [syn_s3_speed.opt] - Rev 38

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FLOWTYPE = FPGA_SYNTHESIS;
#
# $Id: syn_s3_speed.opt 672 2015-05-02 21:58:28Z mueller $
#
#  Revision History: 
# Date         Rev Version  Comment
# 2013-10-05   540   1.2    use -shreg_extract NO to avoid shreg capture flops
# 2011-08-13   405   1.1    renamed, moved to rtl/make;
# 2007-07-20    67   1.0    Initial version
#
# Derived from ISE xst_vhdl.opt
#
# ----------------------------------------------------------------------------
# Options for XST
#
Program xst
-ifn <design>_xst.scr;            # input XST script file
-ofn <design>_xst.log;            # output XST log file
-intstyle xflow;                  # Message Reporting Style
#
# ParamFile lists the XST Properties that can be set by the user. 
#
ParamFile: <design>_xst.scr
"run";
#
# Global Synthesis Options
#
"-ifn <synthdesign>";             # Input/Project File Name
"-ifmt VHDL";                     # Input Format (Verilog or VHDL)
"-ofn <design>";                  # Output File Name
"-ofmt ngc";                      # Output File Format
"-p <partname>";                  # Target Device
"-opt_mode SPEED";                # Optimization Criteria # AREA or SPEED
"-opt_level 2";                   # Optimization Effort Criteria: 2=High
## "-shreg_min_size 3";           # not available for Spartan-3 !!
"-shreg_extract NO";              # --> switch shreg extraction off instead
"-uc <design>.xcf";               # Constraint File name
## Note:
##   "-use_new_parser yes";
## solves some nasty 'INTERNAL_ERROR:Xst:cmain.c:3464:1.56' problems, but
## leads to other problems later on (un-routable designs ect).
## Therefore currently not used.
#
# The following are HDL Options
#
End ParamFile
End Program xst
#

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