URL
https://opencores.org/ocsvn/wiegand_ctl/wiegand_ctl/trunk
Subversion Repositories wiegand_ctl
[/] [wiegand_ctl/] [trunk/] [syn/] [xilinx/] [wiegand_tx/] [ise/] [wiegand_tx_top/] [planAhead_run_1/] [wiegand_tx_top.data/] [sources_1/] [ports.xml] - Rev 17
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<?xml version="1.0"?>
<Interface Version="1" Minor="1">
<Ifc Id="ROOT" Top="1">
<Bus Id="wb_dat_o">
<Port Id="31" Dir="OUT"/>
<Port Id="30" Dir="OUT"/>
<Port Id="29" Dir="OUT"/>
<Port Id="28" Dir="OUT"/>
<Port Id="27" Dir="OUT"/>
<Port Id="26" Dir="OUT"/>
<Port Id="25" Dir="OUT"/>
<Port Id="24" Dir="OUT"/>
<Port Id="23" Dir="OUT"/>
<Port Id="22" Dir="OUT"/>
<Port Id="21" Dir="OUT"/>
<Port Id="20" Dir="OUT"/>
<Port Id="19" Dir="OUT"/>
<Port Id="18" Dir="OUT"/>
<Port Id="17" Dir="OUT"/>
<Port Id="16" Dir="OUT"/>
<Port Id="15" Dir="OUT"/>
<Port Id="14" Dir="OUT"/>
<Port Id="13" Dir="OUT"/>
<Port Id="12" Dir="OUT"/>
<Port Id="11" Dir="OUT"/>
<Port Id="10" Dir="OUT"/>
<Port Id="9" Dir="OUT"/>
<Port Id="8" Dir="OUT"/>
<Port Id="7" Dir="OUT"/>
<Port Id="6" Dir="OUT"/>
<Port Id="5" Dir="OUT"/>
<Port Id="4" Dir="OUT"/>
<Port Id="3" Dir="OUT"/>
<Port Id="2" Dir="OUT"/>
<Port Id="1" Dir="OUT"/>
<Port Id="0" Dir="OUT"/>
</Bus>
<Bus Id="wb_cti_i">
<Port Id="2" Dir="IN"/>
<Port Id="1" Dir="IN"/>
<Port Id="0" Dir="IN"/>
</Bus>
<Bus Id="wb_adr_i">
<Port Id="5" Dir="IN"/>
<Port Id="4" Dir="IN"/>
<Port Id="3" Dir="IN"/>
<Port Id="2" Dir="IN"/>
<Port Id="1" Dir="IN"/>
<Port Id="0" Dir="IN"/>
</Bus>
<Bus Id="wb_dat_i">
<Port Id="31" Dir="IN"/>
<Port Id="30" Dir="IN"/>
<Port Id="29" Dir="IN"/>
<Port Id="28" Dir="IN"/>
<Port Id="27" Dir="IN"/>
<Port Id="26" Dir="IN"/>
<Port Id="25" Dir="IN"/>
<Port Id="24" Dir="IN"/>
<Port Id="23" Dir="IN"/>
<Port Id="22" Dir="IN"/>
<Port Id="21" Dir="IN"/>
<Port Id="20" Dir="IN"/>
<Port Id="19" Dir="IN"/>
<Port Id="18" Dir="IN"/>
<Port Id="17" Dir="IN"/>
<Port Id="16" Dir="IN"/>
<Port Id="15" Dir="IN"/>
<Port Id="14" Dir="IN"/>
<Port Id="13" Dir="IN"/>
<Port Id="12" Dir="IN"/>
<Port Id="11" Dir="IN"/>
<Port Id="10" Dir="IN"/>
<Port Id="9" Dir="IN"/>
<Port Id="8" Dir="IN"/>
<Port Id="7" Dir="IN"/>
<Port Id="6" Dir="IN"/>
<Port Id="5" Dir="IN"/>
<Port Id="4" Dir="IN"/>
<Port Id="3" Dir="IN"/>
<Port Id="2" Dir="IN"/>
<Port Id="1" Dir="IN"/>
<Port Id="0" Dir="IN"/>
</Bus>
<Bus Id="wb_sel_i">
<Port Id="3" Dir="IN"/>
<Port Id="2" Dir="IN"/>
<Port Id="1" Dir="IN"/>
<Port Id="0" Dir="IN"/>
</Bus>
<Port Id="wb_stb_i" Dir="IN"/>
<Port Id="one_o" Dir="OUT"/>
<Port Id="wb_clk_i" Dir="IN"/>
<Port Id="wb_rst_i" Dir="IN"/>
<Port Id="wb_err_o" Dir="OUT"/>
<Port Id="wb_cyc_i" Dir="IN"/>
<Port Id="wb_rty_o" Dir="OUT"/>
<Port Id="wb_we_i" Dir="IN"/>
<Port Id="zero_o" Dir="OUT"/>
<Port Id="wb_ack_o" Dir="OUT"/>
</Ifc>
</Interface>