URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [Integration_test/] [synthetic_sim/] [report] - Rev 54

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Verification Results:
****************************mesh_4x4_2cycle_mcast_f : Compile *******************************:
         model is generated successfully.
****************************mesh_4x4_2cycle_mcast_f     : random traffic *******************************:
         Passed:   zero load (5,15.2151) saturation (30,357.163)
****************************mesh_4x4_2cycle_mcast_f     : transposed 1 traffic *******************************:
         Error in running simulation:                    0: ERROR: Routing module did not set any destination port for an injected multicast packet TOP.router_top_v.router.router_ref.p_[0].multi.multicast_process.debg 
                    0: ERROR: The self-loop is not enabled in the router while a packet is injected to the NoC with identical source and destination address in endpoint  9. destination nodes:0X0200. : TOP.traffic_gen_top

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Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [Integration_test/] [synthetic_sim/] [report] - Rev 54