URL
https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk
Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc
[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [perl_gui/] [lib/] [interface/] [wb_slave.ITC] - Rev 48
Compare with Previous | Blame | View Log
$HashRef = bless( {'connection_num' => 'single connection','name' => 'wb_slave','description' => 'wish bone bus slave interface','modules' => {'clk_socket' => {},'wb_master_socket' => {},'wb_slave_socket' => {},'reset_socket' => {}},'ports' => {'tag_o' => {'outport_type' => 'concatenate','connect_name' => 'tag_i','name' => 'tag_o','range' => 'TAGw-1:0','connect_type' => 'input','connect_range' => 'TAGw-1:0','default_out' => 'Active low','type' => 'output'},'cyc_o' => {'outport_type' => 'concatenate','connect_name' => 'cyc_i','name' => 'cyc_o','range' => '','connect_type' => 'input','connect_range' => '','default_out' => 'Active low','type' => 'output'},'stb_o' => {'outport_type' => 'concatenate','connect_name' => 'stb_i','name' => 'stb_o','range' => '','connect_type' => 'input','connect_range' => '','default_out' => 'Active low','type' => 'output'},'dat_i' => {'outport_type' => 'concatenate','connect_name' => 'dat_o','name' => 'dat_i','range' => 'Dw-1:0','connect_type' => 'output','connect_range' => 'Dw-1:0','default_out' => 'Active low','type' => 'input'},'bte_o' => {'outport_type' => 'concatenate','connect_name' => 'bte_i','name' => 'bte_o','range' => 'BTEw-1:0','connect_type' => 'input','connect_range' => 'BTEw-1:0','default_out' => 'Active low','type' => 'output'},'dat_o' => {'outport_type' => 'concatenate','connect_name' => 'dat_i','name' => 'dat_o','range' => 'Dw-1:0','connect_type' => 'input','connect_range' => 'Dw-1:0','default_out' => 'Active low','type' => 'output'},'err_i' => {'outport_type' => 'concatenate','connect_name' => 'err_o','name' => 'err_i','range' => '','connect_type' => 'output','connect_range' => '','default_out' => 'Active low','type' => 'input'},'cti_o' => {'outport_type' => 'concatenate','connect_name' => 'cti_i','name' => 'cti_o','range' => 'CTIw-1:0','connect_type' => 'input','connect_range' => 'CTIw-1:0','default_out' => 'Active low','type' => 'output'},'adr_o' => {'outport_type' => 'concatenate','connect_name' => 'adr_i','name' => 'adr_o','range' => 'Aw-1:0','connect_type' => 'input','connect_range' => 'Aw-1:0','default_out' => 'Active low','type' => 'output'},'rty_i' => {'outport_type' => 'concatenate','connect_name' => 'rty_o','name' => 'rty_i','range' => '','connect_type' => 'output','connect_range' => '','default_out' => 'Active low','type' => 'input'},'we_o' => {'outport_type' => 'concatenate','connect_name' => 'we_i','name' => 'we_o','range' => '','connect_type' => 'input','connect_range' => '','default_out' => 'Active low','type' => 'output'},'sel_o' => {'outport_type' => 'concatenate','connect_name' => 'sel_i','name' => 'sel_o','range' => 'SELw-1:0','connect_type' => 'input','connect_range' => 'SELw-1:0','default_out' => 'Active low','type' => 'output'},'ack_i' => {'outport_type' => 'concatenate','connect_name' => 'ack_o','name' => 'ack_i','range' => '','connect_type' => 'output','connect_range' => '','default_out' => 'Active low','type' => 'input'}},'file_name' => 'mpsoc/perl_gui/lib/verilog/bus.v','module_name' => 'wb_slave_socket','type' => 'socket','category' => 'wishbone'}, 'intfc_gen' );