OpenCores
URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [rtl/] [src_peripheral/] [ethmac/] [eth] - Rev 48

Compare with Previous | Blame | View Log

#ifndef ${IP}_H
        #define ${IP}_H

#ifndef ETH_BASIC_DEF
        #define ETH_BASIC_DEF

//MODER BITS
#define ETH_RECSMAL             0x00010000
#define ETH_PAD                 0x00008000
#define ETH_HUGEN               0x00004000
#define ETH_CRCEN               0x00002000
#define ETH_DLYCRCEN            0x00001000
#define ETH_FULLD               0x00000400
#define ETH_EXDFREN             0x00000200
#define ETH_NOBCKOF             0x00000100
#define ETH_LOOPBCK             0x00000080
#define ETH_IFG                 0x00000040
#define ETH_PRO                 0x00000020
#define ETH_IAM                 0x00000010
#define ETH_BRO                 0x00000008
#define ETH_NOPRE               0x00000004
#define ETH_TXEN                0x00000002
#define ETH_RXEN                0x00000001

//INTERRUPTS BITS
#define ETH_RXC                 0x00000040
#define ETH_TXC                 0x00000020
#define ETH_BUSY                0x00000010
#define ETH_RXE                 0x00000008
#define ETH_RXB                 0x00000004
#define ETH_TXE                 0x00000002
#define ETH_TXB                 0x00000001

//BUFFER DESCRIPTOR BITS
#define ETH_RXBD_EMPTY          0x00008000
#define ETH_RXBD_IRQ            0x00004000
#define ETH_RXBD_WRAP           0x00002000
#define ETH_RXBD_CF             0x00000100
#define ETH_RXBD_MISS           0x00000080
#define ETH_RXBD_OR             0x00000040
#define ETH_RXBD_IS             0x00000020
#define ETH_RXBD_DN             0x00000010
#define ETH_RXBD_TL             0x00000008
#define ETH_RXBD_SF             0x00000004
#define ETH_RXBD_CRC            0x00000002
#define ETH_RXBD_LC             0x00000001

#define ETH_TXBD_READY          0x00008000
#define ETH_TXBD_IRQ            0x00004000
#define ETH_TXBD_WRAP           0x00002000
#define ETH_TXBD_PAD            0x00001000
#define ETH_TXBD_CRC            0x00000800
#define ETH_TXBD_UR             0x00000100
#define ETH_TXBD_RL             0x00000008
#define ETH_TXBD_LC             0x00000004
#define ETH_TXBD_DF             0x00000002
#define ETH_TXBD_CS             0x00000001

#define HDR_LEN                 14
#define CRC_LEN                 4
#define BD_SND  ( ETH_TXBD_READY | ETH_TXBD_IRQ | ETH_TXBD_WRAP | ETH_TXBD_PAD | ETH_TXBD_CRC )
#define RX_READY    ( ETH_RXBD_EMPTY | ETH_RXBD_IRQ | ETH_RXBD_WRAP )
#define TX_READY ( ETH_TXBD_IRQ | ETH_TXBD_WRAP | ETH_TXBD_PAD | ETH_TXBD_CRC )


#endif



//user defines
#define ${IP}_MAC_ADDR_5        0x55
#define ${IP}_MAC_ADDR_4        0x47
#define ${IP}_MAC_ADDR_3        0x34
#define ${IP}_MAC_ADDR_2        0x22
#define ${IP}_MAC_ADDR_1        0x88
#define ${IP}_MAC_ADDR_0        0x92

#define ${IP}_BROADCAST_ADDR_5  0xFF
#define ${IP}_BROADCAST_ADDR_4  0xFF
#define ${IP}_BROADCAST_ADDR_3  0xFF
#define ${IP}_BROADCAST_ADDR_2  0xFF
#define ${IP}_BROADCAST_ADDR_1  0xFF
#define ${IP}_BROADCAST_ADDR_0  0xFF




int ${IP}_tx_done;
int ${IP}_rx_done;
int ${IP}_rx_len;
unsigned char ${IP}_tx_packet[1536];     //max length
unsigned char ${IP}_rx_packet[1536];
unsigned char * ${IP}_tx_data= & ${IP}_tx_packet[HDR_LEN];
unsigned char * ${IP}_rx_data= & ${IP}_rx_packet[HDR_LEN];

void ${IP}_recv_ack(void);

void ${IP}_init();

int ${IP}_send(int length);

void ${IP}_interrupt();


#endif

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.