URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [src_processor/] [new_lm32/] [sw/] [cpu_flags_gen] - Rev 48

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# -mbarrel-shift-enabled   -mmultiply-enabled -mdivide-enabled -msign-extend-enabled  -fomit-frame-pointer

CFG_SIGN_EXTEND=${SIGN_EXTEND}
CFG_BARREL_SHIFT=${BARREL_SHIFT}
CFG_MULTIPLY=${MULTIPLIER_TYPE}
CFG_DIVIDE=${DIVIDOR_TYPE}


ifeq (${CFG_SIGN_EXTEND},ENABLED)
        FLAG1=  -msign-extend-enabled
endif


ifeq (${CFG_BARREL_SHIFT},PIPE_LINE)
        FLAG2=  -mbarrel-shift-enabled
endif 

ifeq (${CFG_BARREL_SHIFT},MULTI_CYCLE)
        FLAG2= -mbarrel-shift-enabled
endif 



ifeq (${CFG_DIVIDE},MULTI_CYCLE)
        FLAG3=  -mdivide-enabled
endif

ifeq ($(CFG_MULTIPLY),PIPE_LINE)
        FLAG4=  -mmultiply-enabled
endif


ifeq (${CFG_MULTIPLY},MULTI_CYCLE)
        FLAG4=   -mmultiply-enabled
endif


CPU_FLAGS= -fomit-frame-pointer $(FLAG1) $(FLAG2) $(FLAG3) $(FLAG4)


$(info ************cpu flags are:  $(CPU_FLAGS) ************)

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Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [src_processor/] [new_lm32/] [sw/] [cpu_flags_gen] - Rev 48