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<h1>Registers </h1>  </div>
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<p>List of not implemented OCS registers:</p>
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    STREQU    &amp; *038  S   D       Strobe for horiz sync with VB and EQU
    STRVBL    &amp; *03A  S   D       Strobe for horiz sync with VB (vert. blank)
    STRHOR    &amp; *03C  S   DP      Strobe for horiz sync
    STRLONG   &amp; *03E  S   D( E )  Strobe for identification of long horiz. line.
    VHPOSW      *02C  W   A       Write vert and horiz position of beam
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    POT0DAT     *012  R   P( E )  Pot counter pair 0 data (vert,horiz)
    POT1DAT     *014  R   P( E )  Pot counter pair 1 data (vert,horiz)
    POTGOR      *016  R   P       Pot port data read (formerly POTINP)
    POTGO       *034  W   P       Pot port data write and start
</pre></div><p><b><a class="el" href="classocs__copper.html" title="OCS copper implementation with WISHBONE master and slave interface. ">ocs_copper</a></b> </p>
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    COPINS       08C  W   A       Coprocessor instruction fetch identify
</pre></div><p><b><a class="el" href="classocs__serial.html" title="OCS serial port implementation with WISHBONE slave interface. [functionality not implemented]. ">ocs_serial</a></b> </p>
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    SERDATR     *018  R   P       Serial port data and status read
    SERDAT      *030  W   P       Serial port data and stop bits write
    SERPER      *032  W   P       Serial port period and control
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    DSKDATR   &amp; *008  ER  P       Disk data early read (dummy address)
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   BLTDDAT   &amp; *000  ER  A       Blitter destination early read (dummy address)
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