OpenCores
URL https://opencores.org/ocsvn/bustap-jtag/bustap-jtag/trunk

Subversion Repositories bustap-jtag

[/] [bustap-jtag/] [trunk/] [rtl/] [xilinx/] [coregen/] [coregen.cgc] - Rev 20

Compare with Previous | Blame | View Log

<?xml version="1.0" encoding="UTF-8"?>
<spirit:design xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:xilinx="http://www.xilinx.com" >
   <spirit:vendor>xilinx.com</spirit:vendor>
   <spirit:library>project</spirit:library>
   <spirit:name>coregen</spirit:name>
   <spirit:version>1.0</spirit:version>
   <spirit:componentInstances>
      <spirit:componentInstance>
         <spirit:instanceName>chipscope_icon</spirit:instanceName>
         <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="chipscope_icon" spirit:version="1.06.a" />
         <spirit:configurableElementValues>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.COMPONENT_NAME">chipscope_icon</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_UNUSED_BSCAN">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.NUMBER_CONTROL_PORTS">3</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_JTAG_BUFG">true</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CONSTRAINT_TYPE">external</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_SOFTBSCAN">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_EXT_BSCAN">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USER_SCAN_CHAIN">USER1</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.EXAMPLE_DESIGN">false</spirit:configurableElementValue>
         </spirit:configurableElementValues>
         <spirit:vendorExtensions>
            <xilinx:instanceProperties xmlns:xilinx="http://www.xilinx.com">
               <xilinx:projectOptions>
                  <xilinx:projectName>coregen</xilinx:projectName>
                  <xilinx:outputDirectory>./</xilinx:outputDirectory>
                  <xilinx:workingDirectory>./tmp/</xilinx:workingDirectory>
                  <xilinx:subWorkingDirectory>./tmp/_cg/</xilinx:subWorkingDirectory>
               </xilinx:projectOptions>
               <xilinx:part>
                  <xilinx:device>xc7z020</xilinx:device>
                  <xilinx:deviceFamily>zynq</xilinx:deviceFamily>
                  <xilinx:package>clg400</xilinx:package>
                  <xilinx:speedGrade>-2</xilinx:speedGrade>
               </xilinx:part>
               <xilinx:flowOptions>
                  <xilinx:busFormat>BusFormatAngleBracketNotRipped</xilinx:busFormat>
                  <xilinx:designEntry>Verilog</xilinx:designEntry>
                  <xilinx:asySymbol>true</xilinx:asySymbol>
                  <xilinx:flowVendor>Other</xilinx:flowVendor>
                  <xilinx:addPads>false</xilinx:addPads>
                  <xilinx:removeRPMs>false</xilinx:removeRPMs>
                  <xilinx:createNDF>false</xilinx:createNDF>
                  <xilinx:implementationFileType>Ngc</xilinx:implementationFileType>
                  <xilinx:formalVerification>false</xilinx:formalVerification>
               </xilinx:flowOptions>
               <xilinx:simulationOptions>
                  <xilinx:simulationModel>Behavioral</xilinx:simulationModel>
                  <xilinx:simulationLanguage>Verilog</xilinx:simulationLanguage>
                  <xilinx:foundationSym>false</xilinx:foundationSym>
               </xilinx:simulationOptions>
               <xilinx:packageInfo>
                  <xilinx:sourceCoreCreationDate>2012-07-21+03:11</xilinx:sourceCoreCreationDate>
               </xilinx:packageInfo>
            </xilinx:instanceProperties>
         </spirit:vendorExtensions>
      </spirit:componentInstance>
      <spirit:componentInstance>
         <spirit:instanceName>chipscope_vio_fifo</spirit:instanceName>
         <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="chipscope_vio" spirit:version="1.05.a" />
         <spirit:configurableElementValues>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.COMPONENT_NAME">chipscope_vio_fifo</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SYNCHRONOUS_INPUT_PORT_WIDTH">108</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SYNCHRONOUS_OUTPUT_PORT_WIDTH">2</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_ASYNCHRONOUS_OUTPUT_PORT">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_ASYNCHRONOUS_INPUT_PORT">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CONSTRAINT_TYPE">external</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INVERT_CLOCK_INPUT">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ASYNCHRONOUS_OUTPUT_PORT_WIDTH">8</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_SYNCHRONOUS_OUTPUT_PORT">true</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ASYNCHRONOUS_INPUT_PORT_WIDTH">8</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_SYNCHRONOUS_INPUT_PORT">true</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.EXAMPLE_DESIGN">true</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_ASYNC_IN_WIDTH">8</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_SYNC_CLK">1</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_ASYNC_OUT_WIDTH">8</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_SYNC_IN">1</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SRL16_TYPE">2</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SYNC_OUT_WIDTH">2</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_INV_CLK">0</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SYNC_IN_WIDTH">108</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.COMPONENT_NAME">chipscope_vio_fifo</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_EXAMPLE_DESIGN">true</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_XCO_LIST">Component_Name=chipscope_vio_fifo;Enable_Synchronous_Input_Port=true;Enable_Synchronous_Output_Port=true;Enable_Asynchronous_Input_Port=false;Enable_Asynchronous_Output_Port=false;Synchronous_Input_Port_Width=108;Synchronous_Output_Port_Width=2;Asynchronous_Input_Port_Width=8;Asynchronous_Output_Port_Width=8;Invert_Clock_Input=false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_CONSTRAINT_TYPE">external</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_ASYNC_OUT">0</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_ASYNC_IN">0</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_USE_SYNC_OUT">1</spirit:configurableElementValue>
         </spirit:configurableElementValues>
         <spirit:vendorExtensions>
            <xilinx:instanceProperties xmlns:xilinx="http://www.xilinx.com">
               <xilinx:projectOptions>
                  <xilinx:projectName>coregen</xilinx:projectName>
                  <xilinx:outputDirectory>./</xilinx:outputDirectory>
                  <xilinx:workingDirectory>./tmp/</xilinx:workingDirectory>
                  <xilinx:subWorkingDirectory>./tmp/_cg/</xilinx:subWorkingDirectory>
               </xilinx:projectOptions>
               <xilinx:part>
                  <xilinx:device>xc7z020</xilinx:device>
                  <xilinx:deviceFamily>zynq</xilinx:deviceFamily>
                  <xilinx:package>clg400</xilinx:package>
                  <xilinx:speedGrade>-2</xilinx:speedGrade>
               </xilinx:part>
               <xilinx:flowOptions>
                  <xilinx:busFormat>BusFormatAngleBracketNotRipped</xilinx:busFormat>
                  <xilinx:designEntry>Verilog</xilinx:designEntry>
                  <xilinx:asySymbol>true</xilinx:asySymbol>
                  <xilinx:flowVendor>Other</xilinx:flowVendor>
                  <xilinx:addPads>false</xilinx:addPads>
                  <xilinx:removeRPMs>false</xilinx:removeRPMs>
                  <xilinx:createNDF>false</xilinx:createNDF>
                  <xilinx:implementationFileType>Ngc</xilinx:implementationFileType>
                  <xilinx:formalVerification>false</xilinx:formalVerification>
               </xilinx:flowOptions>
               <xilinx:simulationOptions>
                  <xilinx:simulationModel>Structural</xilinx:simulationModel>
                  <xilinx:simulationLanguage>Verilog</xilinx:simulationLanguage>
                  <xilinx:foundationSym>false</xilinx:foundationSym>
               </xilinx:simulationOptions>
               <xilinx:packageInfo>
                  <xilinx:sourceCoreCreationDate>2012-10-12+23:08</xilinx:sourceCoreCreationDate>
               </xilinx:packageInfo>
            </xilinx:instanceProperties>
            <xilinx:generationHistory>
               <xilinx:fileSet>
                  <xilinx:name>customization_generator</xilinx:name>
               </xilinx:fileSet>
               <xilinx:fileSet>
                  <xilinx:name>model_parameter_resolution_generator</xilinx:name>
               </xilinx:fileSet>
               <xilinx:fileSet>
                  <xilinx:name>ip_xco_generator</xilinx:name>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo.xco</xilinx:name>
                     <xilinx:userFileType>xco</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:32:54 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0x724012F7</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
               </xilinx:fileSet>
               <xilinx:fileSet>
                  <xilinx:name>ngc_netlist_generator</xilinx:name>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo/example_design/chipscope_vio_fifo_bb_lib.v</xilinx:name>
                     <xilinx:userFileType>ignore</xilinx:userFileType>
                     <xilinx:userFileType>verilogSynthesis</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:32:54 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0xEC2F0FB0</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo/example_design/example_chipscope_vio_fifo.ucf</xilinx:name>
                     <xilinx:userFileType>ignore</xilinx:userFileType>
                     <xilinx:userFileType>ucf</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:32:57 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0x1390C322</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo/example_design/example_chipscope_vio_fifo.v</xilinx:name>
                     <xilinx:userFileType>ignore</xilinx:userFileType>
                     <xilinx:userFileType>verilogSynthesis</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:32:56 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0x8DB35830</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo/example_design/example_chipscope_vio_fifo.xdc</xilinx:name>
                     <xilinx:userFileType>ignore</xilinx:userFileType>
                     <xilinx:userFileType>xdc</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:32:57 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0x938BE115</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo/implement/chipscope_icon.xco</xilinx:name>
                     <xilinx:userFileType>ignore</xilinx:userFileType>
                     <xilinx:userFileType>xco</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:32:55 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0x1FF80BFB</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo/implement/coregen.cgp</xilinx:name>
                     <xilinx:userFileType>ignore</xilinx:userFileType>
                     <xilinx:userFileType>unknown</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:32:55 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0x940C30DF</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo/implement/example_chipscope_vio_fifo.prj</xilinx:name>
                     <xilinx:userFileType>ignore</xilinx:userFileType>
                     <xilinx:userFileType>unknown</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:32:56 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0xAE724F77</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo/implement/example_chipscope_vio_fifo.xst</xilinx:name>
                     <xilinx:userFileType>ignore</xilinx:userFileType>
                     <xilinx:userFileType>unknown</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:32:58 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0xEBBE356D</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo/implement/ise_implement.bat</xilinx:name>
                     <xilinx:userFileType>ignore</xilinx:userFileType>
                     <xilinx:userFileType>unknown</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:32:55 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0xEE86AB45</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo/implement/ise_implement.sh</xilinx:name>
                     <xilinx:userFileType>ignore</xilinx:userFileType>
                     <xilinx:userFileType>unknown</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:32:58 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0x32780610</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo/implement/pa_ise_implement.tcl</xilinx:name>
                     <xilinx:userFileType>ignore</xilinx:userFileType>
                     <xilinx:userFileType>tcl</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:32:56 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0xC8D9F8F9</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo/implement/rdi_implement.tcl</xilinx:name>
                     <xilinx:userFileType>ignore</xilinx:userFileType>
                     <xilinx:userFileType>tcl</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:32:57 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0xBD351EB6</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo/implement/v_rdi_implement.tcl</xilinx:name>
                     <xilinx:userFileType>ignore</xilinx:userFileType>
                     <xilinx:userFileType>tcl</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:32:58 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0x74FFDD3B</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo/read_me.txt</xilinx:name>
                     <xilinx:userFileType>ignore</xilinx:userFileType>
                     <xilinx:userFileType>txt</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:32:58 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0xCE4AA0B8</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo.cdc</xilinx:name>
                     <xilinx:userFileType>unknown</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:33:59 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0x4CA21057</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo.constraints/chipscope_vio_fifo.ucf</xilinx:name>
                     <xilinx:userFileType>ucf</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:33:59 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0x46D4F328</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo.constraints/chipscope_vio_fifo.xdc</xilinx:name>
                     <xilinx:userFileType>xdc</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:33:59 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0xC2D11607</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo.ngc</xilinx:name>
                     <xilinx:userFileType>ngc</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:33:57 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0xD2121D98</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo.ucf</xilinx:name>
                     <xilinx:userFileType>ignore</xilinx:userFileType>
                     <xilinx:userFileType>ucf</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:33:59 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0x46D4F328</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo.v</xilinx:name>
                     <xilinx:userFileType>verilog</xilinx:userFileType>
                     <xilinx:userFileType>verilogSynthesis</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:33:59 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0x81491EFF</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo.veo</xilinx:name>
                     <xilinx:userFileType>veo</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:33:59 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0x9DE1BF59</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo.xdc</xilinx:name>
                     <xilinx:userFileType>ignore</xilinx:userFileType>
                     <xilinx:userFileType>xdc</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:33:59 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0xC2D11607</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo_xmdf.tcl</xilinx:name>
                     <xilinx:userFileType>tcl</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:32:58 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0x136E503B</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
               </xilinx:fileSet>
               <xilinx:fileSet>
                  <xilinx:name>instantiation_template_generator</xilinx:name>
               </xilinx:fileSet>
               <xilinx:fileSet>
                  <xilinx:name>asy_generator</xilinx:name>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo.asy</xilinx:name>
                     <xilinx:userFileType>asy</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:33:59 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0x42C0F37B</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
               </xilinx:fileSet>
               <xilinx:fileSet>
                  <xilinx:name>xmdf_generator</xilinx:name>
               </xilinx:fileSet>
               <xilinx:fileSet>
                  <xilinx:name>ise_generator</xilinx:name>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo.gise</xilinx:name>
                     <xilinx:userFileType>ignore</xilinx:userFileType>
                     <xilinx:userFileType>gise</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:34:07 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0xE46738AE</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo.xise</xilinx:name>
                     <xilinx:userFileType>ignore</xilinx:userFileType>
                     <xilinx:userFileType>xise</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:34:07 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0x0BED329B</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
               </xilinx:fileSet>
               <xilinx:fileSet>
                  <xilinx:name>deliver_readme_generator</xilinx:name>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo_readme.txt</xilinx:name>
                     <xilinx:userFileType>ignore</xilinx:userFileType>
                     <xilinx:userFileType>txtReadme</xilinx:userFileType>
                     <xilinx:userFileType>txt</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:34:07 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0xEA5F9500</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
               </xilinx:fileSet>
               <xilinx:fileSet>
                  <xilinx:name>flist_generator</xilinx:name>
                  <xilinx:file>
                     <xilinx:name>./chipscope_vio_fifo_flist.txt</xilinx:name>
                     <xilinx:userFileType>ignore</xilinx:userFileType>
                     <xilinx:userFileType>txtFlist</xilinx:userFileType>
                     <xilinx:userFileType>txt</xilinx:userFileType>
                     <xilinx:timeStamp>Fri Feb 07 09:34:07 GMT 2014</xilinx:timeStamp>
                     <xilinx:checkSum>0x2E57030C</xilinx:checkSum>
                     <xilinx:generationId>generationID_1879581046</xilinx:generationId>
                  </xilinx:file>
               </xilinx:fileSet>
               <xilinx:fileSet>
                  <xilinx:name>view_readme_generator</xilinx:name>
               </xilinx:fileSet>
            </xilinx:generationHistory>
         </spirit:vendorExtensions>
      </spirit:componentInstance>
      <spirit:componentInstance>
         <spirit:instanceName>chipscope_vio_mask</spirit:instanceName>
         <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="chipscope_vio" spirit:version="1.05.a" />
         <spirit:configurableElementValues>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.COMPONENT_NAME">chipscope_vio_mask</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SYNCHRONOUS_INPUT_PORT_WIDTH">8</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SYNCHRONOUS_OUTPUT_PORT_WIDTH">40</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_ASYNCHRONOUS_OUTPUT_PORT">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_ASYNCHRONOUS_INPUT_PORT">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CONSTRAINT_TYPE">external</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INVERT_CLOCK_INPUT">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ASYNCHRONOUS_OUTPUT_PORT_WIDTH">8</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_SYNCHRONOUS_OUTPUT_PORT">true</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ASYNCHRONOUS_INPUT_PORT_WIDTH">8</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_SYNCHRONOUS_INPUT_PORT">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.EXAMPLE_DESIGN">true</spirit:configurableElementValue>
         </spirit:configurableElementValues>
         <spirit:vendorExtensions>
            <xilinx:instanceProperties xmlns:xilinx="http://www.xilinx.com">
               <xilinx:projectOptions>
                  <xilinx:projectName>coregen</xilinx:projectName>
                  <xilinx:outputDirectory>./</xilinx:outputDirectory>
                  <xilinx:workingDirectory>./tmp/</xilinx:workingDirectory>
                  <xilinx:subWorkingDirectory>./tmp/_cg/</xilinx:subWorkingDirectory>
               </xilinx:projectOptions>
               <xilinx:part>
                  <xilinx:device>xc7z020</xilinx:device>
                  <xilinx:deviceFamily>zynq</xilinx:deviceFamily>
                  <xilinx:package>clg400</xilinx:package>
                  <xilinx:speedGrade>-2</xilinx:speedGrade>
               </xilinx:part>
               <xilinx:flowOptions>
                  <xilinx:busFormat>BusFormatAngleBracketNotRipped</xilinx:busFormat>
                  <xilinx:designEntry>Verilog</xilinx:designEntry>
                  <xilinx:asySymbol>true</xilinx:asySymbol>
                  <xilinx:flowVendor>Other</xilinx:flowVendor>
                  <xilinx:addPads>false</xilinx:addPads>
                  <xilinx:removeRPMs>false</xilinx:removeRPMs>
                  <xilinx:createNDF>false</xilinx:createNDF>
                  <xilinx:implementationFileType>Ngc</xilinx:implementationFileType>
                  <xilinx:formalVerification>false</xilinx:formalVerification>
               </xilinx:flowOptions>
               <xilinx:simulationOptions>
                  <xilinx:simulationModel>Structural</xilinx:simulationModel>
                  <xilinx:simulationLanguage>Verilog</xilinx:simulationLanguage>
                  <xilinx:foundationSym>false</xilinx:foundationSym>
               </xilinx:simulationOptions>
               <xilinx:packageInfo>
                  <xilinx:sourceCoreCreationDate>2012-07-21+03:12</xilinx:sourceCoreCreationDate>
               </xilinx:packageInfo>
            </xilinx:instanceProperties>
         </spirit:vendorExtensions>
      </spirit:componentInstance>
      <spirit:componentInstance>
         <spirit:instanceName>chipscope_vio_trig</spirit:instanceName>
         <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="chipscope_vio" spirit:version="1.05.a" />
         <spirit:configurableElementValues>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.COMPONENT_NAME">chipscope_vio_trig</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SYNCHRONOUS_INPUT_PORT_WIDTH">8</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SYNCHRONOUS_OUTPUT_PORT_WIDTH">82</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_ASYNCHRONOUS_OUTPUT_PORT">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_ASYNCHRONOUS_INPUT_PORT">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CONSTRAINT_TYPE">external</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INVERT_CLOCK_INPUT">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ASYNCHRONOUS_OUTPUT_PORT_WIDTH">8</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_SYNCHRONOUS_OUTPUT_PORT">true</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ASYNCHRONOUS_INPUT_PORT_WIDTH">8</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_SYNCHRONOUS_INPUT_PORT">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.EXAMPLE_DESIGN">true</spirit:configurableElementValue>
         </spirit:configurableElementValues>
         <spirit:vendorExtensions>
            <xilinx:instanceProperties xmlns:xilinx="http://www.xilinx.com">
               <xilinx:projectOptions>
                  <xilinx:projectName>coregen</xilinx:projectName>
                  <xilinx:outputDirectory>./</xilinx:outputDirectory>
                  <xilinx:workingDirectory>./tmp/</xilinx:workingDirectory>
                  <xilinx:subWorkingDirectory>./tmp/_cg/</xilinx:subWorkingDirectory>
               </xilinx:projectOptions>
               <xilinx:part>
                  <xilinx:device>xc7z020</xilinx:device>
                  <xilinx:deviceFamily>zynq</xilinx:deviceFamily>
                  <xilinx:package>clg400</xilinx:package>
                  <xilinx:speedGrade>-2</xilinx:speedGrade>
               </xilinx:part>
               <xilinx:flowOptions>
                  <xilinx:busFormat>BusFormatAngleBracketNotRipped</xilinx:busFormat>
                  <xilinx:designEntry>Verilog</xilinx:designEntry>
                  <xilinx:asySymbol>true</xilinx:asySymbol>
                  <xilinx:flowVendor>Other</xilinx:flowVendor>
                  <xilinx:addPads>false</xilinx:addPads>
                  <xilinx:removeRPMs>false</xilinx:removeRPMs>
                  <xilinx:createNDF>false</xilinx:createNDF>
                  <xilinx:implementationFileType>Ngc</xilinx:implementationFileType>
                  <xilinx:formalVerification>false</xilinx:formalVerification>
               </xilinx:flowOptions>
               <xilinx:simulationOptions>
                  <xilinx:simulationModel>Structural</xilinx:simulationModel>
                  <xilinx:simulationLanguage>Verilog</xilinx:simulationLanguage>
                  <xilinx:foundationSym>false</xilinx:foundationSym>
               </xilinx:simulationOptions>
               <xilinx:packageInfo>
                  <xilinx:sourceCoreCreationDate>2012-10-12+23:08</xilinx:sourceCoreCreationDate>
               </xilinx:packageInfo>
            </xilinx:instanceProperties>
         </spirit:vendorExtensions>
      </spirit:componentInstance>
      <spirit:componentInstance>
         <spirit:instanceName>scfifo</spirit:instanceName>
         <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="fifo_generator" spirit:version="9.2" />
         <spirit:configurableElementValues>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.COMPONENT_NAME">scfifo</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FIFO_IMPLEMENTATION">Common_Clock_Block_RAM</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SYNCHRONIZATION_STAGES">2</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SYNCHRONIZATION_STAGES_AXI">2</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERFACE_TYPE">Native</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PERFORMANCE_OPTIONS">Standard_FIFO</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INPUT_DATA_WIDTH">98</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INPUT_DEPTH">1024</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.OUTPUT_DATA_WIDTH">98</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.OUTPUT_DEPTH">1024</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_ECC">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_EMBEDDED_REGISTERS">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RESET_PIN">true</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_RESET_SYNCHRONIZATION">true</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RESET_TYPE">Asynchronous_Reset</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FULL_FLAGS_RESET_VALUE">1</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_DOUT_RESET">true</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DOUT_RESET_VALUE">0</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ALMOST_FULL_FLAG">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ALMOST_EMPTY_FLAG">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VALID_FLAG">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.VALID_SENSE">Active_High</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.UNDERFLOW_FLAG">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.UNDERFLOW_SENSE">Active_High</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.WRITE_ACKNOWLEDGE_FLAG">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.WRITE_ACKNOWLEDGE_SENSE">Active_High</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.OVERFLOW_FLAG">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.OVERFLOW_SENSE">Active_High</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INJECT_SBIT_ERROR">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INJECT_DBIT_ERROR">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_EXTRA_LOGIC">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DATA_COUNT">true</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DATA_COUNT_WIDTH">10</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.WRITE_DATA_COUNT">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.WRITE_DATA_COUNT_WIDTH">10</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.READ_DATA_COUNT">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.READ_DATA_COUNT_WIDTH">10</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DISABLE_TIMING_VIOLATIONS">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.READ_CLOCK_FREQUENCY">1</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.WRITE_CLOCK_FREQUENCY">1</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PROGRAMMABLE_FULL_TYPE">No_Programmable_Full_Threshold</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FULL_THRESHOLD_ASSERT_VALUE">1022</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FULL_THRESHOLD_NEGATE_VALUE">1021</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PROGRAMMABLE_EMPTY_TYPE">No_Programmable_Empty_Threshold</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.EMPTY_THRESHOLD_ASSERT_VALUE">2</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.EMPTY_THRESHOLD_NEGATE_VALUE">3</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AXI_TYPE">AXI4_Stream</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLOCK_TYPE_AXI">Common_Clock</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.USE_CLOCK_ENABLE">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CLOCK_ENABLE_TYPE">Slave_Interface_Clock_Enable</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_WRITE_CHANNEL">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_READ_CHANNEL">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ID_WIDTH">4</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AXI_ADDRESS_WIDTH">32</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AXI_DATA_WIDTH">64</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_AWUSER">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AWUSER_WIDTH">1</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_WUSER">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.WUSER_WIDTH">1</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_BUSER">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.BUSER_WIDTH">1</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_ARUSER">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ARUSER_WIDTH">1</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_RUSER">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RUSER_WIDTH">1</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_TDATA">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.TDATA_WIDTH">64</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_TID">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.TID_WIDTH">8</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_TDEST">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.TDEST_WIDTH">4</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_TUSER">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.TUSER_WIDTH">4</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_TREADY">true</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_TLAST">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_TSTROBE">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.TSTRB_WIDTH">4</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_TKEEP">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.TKEEP_WIDTH">4</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.WACH_TYPE">FIFO</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FIFO_IMPLEMENTATION_WACH">Common_Clock_Block_RAM</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FIFO_APPLICATION_TYPE_WACH">Data_FIFO</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_ECC_WACH">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INJECT_SBIT_ERROR_WACH">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INJECT_DBIT_ERROR_WACH">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INPUT_DEPTH_WACH">16</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_DATA_COUNTS_WACH">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PROGRAMMABLE_FULL_TYPE_WACH">No_Programmable_Full_Threshold</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FULL_THRESHOLD_ASSERT_VALUE_WACH">1023</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PROGRAMMABLE_EMPTY_TYPE_WACH">No_Programmable_Empty_Threshold</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.EMPTY_THRESHOLD_ASSERT_VALUE_WACH">1022</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.WDCH_TYPE">FIFO</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FIFO_IMPLEMENTATION_WDCH">Common_Clock_Block_RAM</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FIFO_APPLICATION_TYPE_WDCH">Data_FIFO</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_ECC_WDCH">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INJECT_SBIT_ERROR_WDCH">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INJECT_DBIT_ERROR_WDCH">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INPUT_DEPTH_WDCH">1024</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_DATA_COUNTS_WDCH">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PROGRAMMABLE_FULL_TYPE_WDCH">No_Programmable_Full_Threshold</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FULL_THRESHOLD_ASSERT_VALUE_WDCH">1023</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PROGRAMMABLE_EMPTY_TYPE_WDCH">No_Programmable_Empty_Threshold</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.EMPTY_THRESHOLD_ASSERT_VALUE_WDCH">1022</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.WRCH_TYPE">FIFO</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FIFO_IMPLEMENTATION_WRCH">Common_Clock_Block_RAM</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FIFO_APPLICATION_TYPE_WRCH">Data_FIFO</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_ECC_WRCH">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INJECT_SBIT_ERROR_WRCH">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INJECT_DBIT_ERROR_WRCH">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INPUT_DEPTH_WRCH">16</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_DATA_COUNTS_WRCH">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PROGRAMMABLE_FULL_TYPE_WRCH">No_Programmable_Full_Threshold</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FULL_THRESHOLD_ASSERT_VALUE_WRCH">1023</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PROGRAMMABLE_EMPTY_TYPE_WRCH">No_Programmable_Empty_Threshold</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.EMPTY_THRESHOLD_ASSERT_VALUE_WRCH">1022</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RACH_TYPE">FIFO</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FIFO_IMPLEMENTATION_RACH">Common_Clock_Block_RAM</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FIFO_APPLICATION_TYPE_RACH">Data_FIFO</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_ECC_RACH">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INJECT_SBIT_ERROR_RACH">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INJECT_DBIT_ERROR_RACH">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INPUT_DEPTH_RACH">16</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_DATA_COUNTS_RACH">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PROGRAMMABLE_FULL_TYPE_RACH">No_Programmable_Full_Threshold</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FULL_THRESHOLD_ASSERT_VALUE_RACH">1023</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PROGRAMMABLE_EMPTY_TYPE_RACH">No_Programmable_Empty_Threshold</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.EMPTY_THRESHOLD_ASSERT_VALUE_RACH">1022</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RDCH_TYPE">FIFO</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FIFO_IMPLEMENTATION_RDCH">Common_Clock_Block_RAM</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FIFO_APPLICATION_TYPE_RDCH">Data_FIFO</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_ECC_RDCH">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INJECT_SBIT_ERROR_RDCH">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INJECT_DBIT_ERROR_RDCH">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INPUT_DEPTH_RDCH">1024</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_DATA_COUNTS_RDCH">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PROGRAMMABLE_FULL_TYPE_RDCH">No_Programmable_Full_Threshold</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FULL_THRESHOLD_ASSERT_VALUE_RDCH">1023</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PROGRAMMABLE_EMPTY_TYPE_RDCH">No_Programmable_Empty_Threshold</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.EMPTY_THRESHOLD_ASSERT_VALUE_RDCH">1022</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.AXIS_TYPE">FIFO</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FIFO_IMPLEMENTATION_AXIS">Common_Clock_Block_RAM</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FIFO_APPLICATION_TYPE_AXIS">Data_FIFO</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_ECC_AXIS">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INJECT_SBIT_ERROR_AXIS">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INJECT_DBIT_ERROR_AXIS">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INPUT_DEPTH_AXIS">1024</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_DATA_COUNTS_AXIS">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PROGRAMMABLE_FULL_TYPE_AXIS">No_Programmable_Full_Threshold</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FULL_THRESHOLD_ASSERT_VALUE_AXIS">1023</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PROGRAMMABLE_EMPTY_TYPE_AXIS">No_Programmable_Empty_Threshold</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.EMPTY_THRESHOLD_ASSERT_VALUE_AXIS">1022</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.REGISTER_SLICE_MODE_WACH">Fully_Registered</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.REGISTER_SLICE_MODE_WDCH">Fully_Registered</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.REGISTER_SLICE_MODE_WRCH">Fully_Registered</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.REGISTER_SLICE_MODE_RACH">Fully_Registered</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.REGISTER_SLICE_MODE_RDCH">Fully_Registered</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.REGISTER_SLICE_MODE_AXIS">Fully_Registered</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.UNDERFLOW_FLAG_AXI">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.UNDERFLOW_SENSE_AXI">Active_High</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.OVERFLOW_FLAG_AXI">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.OVERFLOW_SENSE_AXI">Active_High</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DISABLE_TIMING_VIOLATIONS_AXI">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ADD_NGC_CONSTRAINT_AXI">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_COMMON_UNDERFLOW">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_COMMON_OVERFLOW">false</spirit:configurableElementValue>
            <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ENABLE_READ_POINTER_INCREMENT_BY2">false</spirit:configurableElementValue>
         </spirit:configurableElementValues>
         <spirit:vendorExtensions>
            <xilinx:instanceProperties xmlns:xilinx="http://www.xilinx.com">
               <xilinx:projectOptions>
                  <xilinx:projectName>coregen</xilinx:projectName>
                  <xilinx:outputDirectory>./</xilinx:outputDirectory>
                  <xilinx:workingDirectory>./tmp/</xilinx:workingDirectory>
                  <xilinx:subWorkingDirectory>./tmp/_cg/</xilinx:subWorkingDirectory>
               </xilinx:projectOptions>
               <xilinx:part>
                  <xilinx:device>xc7z020</xilinx:device>
                  <xilinx:deviceFamily>zynq</xilinx:deviceFamily>
                  <xilinx:package>clg400</xilinx:package>
                  <xilinx:speedGrade>-2</xilinx:speedGrade>
               </xilinx:part>
               <xilinx:flowOptions>
                  <xilinx:busFormat>BusFormatAngleBracketNotRipped</xilinx:busFormat>
                  <xilinx:designEntry>Verilog</xilinx:designEntry>
                  <xilinx:asySymbol>true</xilinx:asySymbol>
                  <xilinx:flowVendor>Other</xilinx:flowVendor>
                  <xilinx:addPads>false</xilinx:addPads>
                  <xilinx:removeRPMs>false</xilinx:removeRPMs>
                  <xilinx:createNDF>false</xilinx:createNDF>
                  <xilinx:implementationFileType>Ngc</xilinx:implementationFileType>
                  <xilinx:formalVerification>false</xilinx:formalVerification>
               </xilinx:flowOptions>
               <xilinx:simulationOptions>
                  <xilinx:simulationModel>Behavioral</xilinx:simulationModel>
                  <xilinx:simulationLanguage>Verilog</xilinx:simulationLanguage>
                  <xilinx:foundationSym>false</xilinx:foundationSym>
               </xilinx:simulationOptions>
               <xilinx:packageInfo>
                  <xilinx:sourceCoreCreationDate>2012-06-23+13:35</xilinx:sourceCoreCreationDate>
               </xilinx:packageInfo>
            </xilinx:instanceProperties>
         </spirit:vendorExtensions>
      </spirit:componentInstance>
   </spirit:componentInstances>
   <spirit:vendorExtensions>
      <xilinx:instanceProperties>
         <xilinx:projectOptions>
            <xilinx:projectName>coregen</xilinx:projectName>
            <xilinx:outputDirectory>./</xilinx:outputDirectory>
            <xilinx:workingDirectory>./tmp/</xilinx:workingDirectory>
            <xilinx:subWorkingDirectory>./tmp/_cg/</xilinx:subWorkingDirectory>
         </xilinx:projectOptions>
         <xilinx:part>
            <xilinx:device>xc7z020</xilinx:device>
            <xilinx:deviceFamily>zynq</xilinx:deviceFamily>
            <xilinx:package>clg400</xilinx:package>
            <xilinx:speedGrade>-2</xilinx:speedGrade>
         </xilinx:part>
         <xilinx:flowOptions>
            <xilinx:busFormat>BusFormatAngleBracketNotRipped</xilinx:busFormat>
            <xilinx:designEntry>Verilog</xilinx:designEntry>
            <xilinx:asySymbol>true</xilinx:asySymbol>
            <xilinx:flowVendor>Other</xilinx:flowVendor>
            <xilinx:addPads>false</xilinx:addPads>
            <xilinx:removeRPMs>false</xilinx:removeRPMs>
            <xilinx:createNDF>false</xilinx:createNDF>
            <xilinx:implementationFileType>Ngc</xilinx:implementationFileType>
            <xilinx:formalVerification>false</xilinx:formalVerification>
         </xilinx:flowOptions>
         <xilinx:simulationOptions>
            <xilinx:simulationModel>Behavioral</xilinx:simulationModel>
            <xilinx:simulationLanguage>Verilog</xilinx:simulationLanguage>
            <xilinx:foundationSym>false</xilinx:foundationSym>
         </xilinx:simulationOptions>
      </xilinx:instanceProperties>
   </spirit:vendorExtensions>
</spirit:design>

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.