Subversion Repositories g729a_codec

-----------------------------------------------------------------
--                                                             --
-----------------------------------------------------------------
--                                                             --
-- Copyright (C) 2013 Stefano Tonello                          --
--                                                             --
-- This source file may be used and distributed without        --
-- restriction provided that this copyright statement is not   --
-- removed from the file and that any derivative work contains --
-- the original copyright notice and the associated disclaimer.--
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-- THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY         --
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-- OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE         --
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-----------------------------------------------------------------
 
---------------------------------------------------------------
-- adder with carry-in
---------------------------------------------------------------
 
library IEEE;
use IEEE.std_logic_1164.all; 
use IEEE.numeric_std.all;
 
library WORK;
use WORK.G729A_ASIP_PKG.all;
use WORK.G729A_ASIP_BASIC_PKG.all;
use WORK.G729A_ASIP_ARITH_PKG.all;
 
entity G729A_ASIP_ADDER is
  generic(
    WIDTH : integer := 16
  );
  port(
    OPA_i : in signed(WIDTH-1 downto 0);
    OPB_i : in signed(WIDTH-1 downto 0);
    CI_i : in std_logic;
 
    SUM_o : out signed(WIDTH-1 downto 0)
  );
end G729A_ASIP_ADDER;
 
architecture ARC of G729A_ASIP_ADDER is
 
  signal TMP : signed(WIDTH downto 0);
 
begin
 
  -- this encoding forces inferring of an adder with carry-in,
  -- rather than two cascaded adders.
 
  TMP <= (OPA_i & '1') + (OPB_i & CI_i);
 
  SUM_o <= TMP(WIDTH downto 1);
 
end ARC;