Subversion Repositories mips_enhanced

#
# This file has been automatically generated by the Symphony EDA IDE
# Please do NOT modify this file manually. If you do, do it with
# extreme care. This file represents your project settings. Corrupting
# this file can render this file useless!!!
#
# Begin version identification section
[version]
 version        = 1
[]
# Begin libraries section (used by all tools)
[libraries]
 ieee   = $SYMPHONYEDA/lib/ieee/ieee.sym
 grlib = sonata/grlib.sym
 unisim = sonata/unisim.sym
 dw02 = sonata/dw02.sym
 synplify = sonata/synplify.sym
 techmap = sonata/techmap.sym
 spw = sonata/spw.sym
 eth = sonata/eth.sym
 opencores = sonata/opencores.sym
 gaisler = sonata/gaisler.sym
 esa = sonata/esa.sym
 micron = sonata/micron.sym
 sonata = sonata/sonata.sym
[]
# End of libraries section
  [options]
    [booloption]
     name       = -strict
     value      = 0
     invert     = 0
    []
    [booloption]
     name       = -s
     value      = 0
     invert     = 0
    []
    [stringoption]
     name       = -breakon
     value      = FAILURE
    []
    [stringoption]
     name       = -stdin
     value      = ""
    []
    [stringoption]
     name       = -stdout
     value      = ""
    []
    [stringoption]
     name       = -coverage
     value      = ""
    []
    [stringoption]
     name       = -r
     value      = 1ps
    []
    [multistringoption]
     name       = -nowarn
    []
    [multistringoption]
     name       = -noaccel
    []
    [multistringoption]
     name       = -sdftyp
    []
    [multistringoption]
     name       = -sdfmin
    []
    [multistringoption]
     name       = -sdfmax
    []
    [multistringoption]
     name       = -sdfnone
    []
  []
# Begin description of library ieee
[library]
 name = ieee
  [options]
    [booloption]
     name       = -87
     value      = 0
     invert     = 0
    []
    [booloption]
     name       = -x
     value      = 0
     invert     = 0
    []
    [booloption]
     name       = -s
     value      = 1
     invert     = 0
    []
    [booloption]
     name       = -strict
     value      = 0
     invert     = 0
    []
    [intoption]
     name       = -maxerrors
     value      = 10
    []
    [booloption]
     name       = -autoorder
     value      = 1
     invert     = 0
    []
  []
[]
# End description of library ieee

[library]
name = grlib
  [options]
   [booloption]
    name   = -autoorder
    value  = 0
    invert = 0
   []
  []
 [file]
  name = ../../lib/grlib/stdlib/version.vhd
 []
 [file]
  name = ../../lib/grlib/stdlib/stdlib.vhd
 []
 [file]
  name = ../../lib/grlib/stdlib/stdio.vhd
 []
 [file]
  name = ../../lib/grlib/util/util.vhd
 []
 [file]
  name = ../../lib/grlib/sparc/sparc.vhd
 []
 [file]
  name = ../../lib/grlib/sparc/sparc_disas.vhd
 []
 [file]
  name = ../../lib/grlib/sparc/cpu_disas.vhd
 []
 [file]
  name = ../../lib/grlib/modgen/multlib.vhd
 []
 [file]
  name = ../../lib/grlib/modgen/leaves.vhd
 []
 [file]
  name = ../../lib/grlib/amba/amba.vhd
 []
 [file]
  name = ../../lib/grlib/amba/devices.vhd
 []
 [file]
  name = ../../lib/grlib/amba/defmst.vhd
 []
 [file]
  name = ../../lib/grlib/amba/apbctrl.vhd
 []
 [file]
  name = ../../lib/grlib/amba/ahbctrl.vhd
 []
 [file]
  name = ../../lib/grlib/amba/dma2ahb_pkg.vhd
 []
 [file]
  name = ../../lib/grlib/amba/dma2ahb.vhd
 []
 [file]
  name = ../../lib/grlib/amba/dma2ahb_tp.vhd
 []
[]
[library]
name = unisim
  [options]
   [booloption]
    name   = -autoorder
    value  = 0
    invert = 0
   []
  []
 [file]
  name = ../../lib/tech/unisim/vcomponents/xilinx_vcomponents.vhd
 []
 [file]
  name = ../../lib/tech/unisim/simprims/xilinx_simprims.vhd
 []
 [file]
  name = ../../lib/tech/unisim/simprims/xilinx_mem.vhd
 []
[]
[library]
name = dw02
  [options]
   [booloption]
    name   = -autoorder
    value  = 0
    invert = 0
   []
  []
 [file]
  name = ../../lib/tech/dw02/comp/DW02_components.vhd
 []
[]
[library]
name = synplify
  [options]
   [booloption]
    name   = -autoorder
    value  = 0
    invert = 0
   []
  []
 [file]
  name = ../../lib/synplify/sim/synplify.vhd
 []
 [file]
  name = ../../lib/synplify/sim/synattr.vhd
 []
[]
[library]
name = techmap
  [options]
   [booloption]
    name   = -autoorder
    value  = 0
    invert = 0
   []
  []
 [file]
  name = ../../lib/techmap/gencomp/gencomp.vhd
 []
 [file]
  name = ../../lib/techmap/gencomp/netcomp.vhd
 []
 [file]
  name = ../../lib/techmap/inferred/memory_inferred.vhd
 []
 [file]
  name = ../../lib/techmap/inferred/ddr_inferred.vhd
 []
 [file]
  name = ../../lib/techmap/inferred/mul_inferred.vhd
 []
 [file]
  name = ../../lib/techmap/inferred/ddr_phy_inferred.vhd
 []
 [file]
  name = ../../lib/techmap/dw02/mul_dw_gen.vhd
 []
 [file]
  name = ../../lib/techmap/unisim/memory_unisim.vhd
 []
 [file]
  name = ../../lib/techmap/unisim/buffer_unisim.vhd
 []
 [file]
  name = ../../lib/techmap/unisim/pads_unisim.vhd
 []
 [file]
  name = ../../lib/techmap/unisim/clkgen_unisim.vhd
 []
 [file]
  name = ../../lib/techmap/unisim/tap_unisim.vhd
 []
 [file]
  name = ../../lib/techmap/unisim/ddr_unisim.vhd
 []
 [file]
  name = ../../lib/techmap/unisim/ddr_phy_unisim.vhd
 []
 [file]
  name = ../../lib/techmap/unisim/grspwc_unisim.vhd
 []
 [file]
  name = ../../lib/techmap/unisim/grfpw_unisim.vhd
 []
 [file]
  name = ../../lib/techmap/unisim/grusbhc_unisimpkg.vhd
 []
 [file]
  name = ../../lib/techmap/unisim/grusbhc_unisim.vhd
 []
 [file]
  name = ../../lib/techmap/unisim/ssrctrl_unisim.vhd
 []
 [file]
  name = ../../lib/techmap/maps/allclkgen.vhd
 []
 [file]
  name = ../../lib/techmap/maps/allddr.vhd
 []
 [file]
  name = ../../lib/techmap/maps/allmem.vhd
 []
 [file]
  name = ../../lib/techmap/maps/allpads.vhd
 []
 [file]
  name = ../../lib/techmap/maps/alltap.vhd
 []
 [file]
  name = ../../lib/techmap/maps/clkgen.vhd
 []
 [file]
  name = ../../lib/techmap/maps/clkmux.vhd
 []
 [file]
  name = ../../lib/techmap/maps/clkand.vhd
 []
 [file]
  name = ../../lib/techmap/maps/ddr_ireg.vhd
 []
 [file]
  name = ../../lib/techmap/maps/ddr_oreg.vhd
 []
 [file]
  name = ../../lib/techmap/maps/ddrphy.vhd
 []
 [file]
  name = ../../lib/techmap/maps/syncram.vhd
 []
 [file]
  name = ../../lib/techmap/maps/syncram64.vhd
 []
 [file]
  name = ../../lib/techmap/maps/syncram_2p.vhd
 []
 [file]
  name = ../../lib/techmap/maps/syncram_dp.vhd
 []
 [file]
  name = ../../lib/techmap/maps/syncfifo.vhd
 []
 [file]
  name = ../../lib/techmap/maps/regfile_3p.vhd
 []
 [file]
  name = ../../lib/techmap/maps/tap.vhd
 []
 [file]
  name = ../../lib/techmap/maps/techbuf.vhd
 []
 [file]
  name = ../../lib/techmap/maps/clkpad.vhd
 []
 [file]
  name = ../../lib/techmap/maps/clkpad_ds.vhd
 []
 [file]
  name = ../../lib/techmap/maps/inpad.vhd
 []
 [file]
  name = ../../lib/techmap/maps/inpad_ds.vhd
 []
 [file]
  name = ../../lib/techmap/maps/iodpad.vhd
 []
 [file]
  name = ../../lib/techmap/maps/iopad.vhd
 []
 [file]
  name = ../../lib/techmap/maps/iopad_ds.vhd
 []
 [file]
  name = ../../lib/techmap/maps/lvds_combo.vhd
 []
 [file]
  name = ../../lib/techmap/maps/odpad.vhd
 []
 [file]
  name = ../../lib/techmap/maps/outpad.vhd
 []
 [file]
  name = ../../lib/techmap/maps/outpad_ds.vhd
 []
 [file]
  name = ../../lib/techmap/maps/toutpad.vhd
 []
 [file]
  name = ../../lib/techmap/maps/skew_outpad.vhd
 []
 [file]
  name = ../../lib/techmap/maps/grspwc_net.vhd
 []
 [file]
  name = ../../lib/techmap/maps/grlfpw_net.vhd
 []
 [file]
  name = ../../lib/techmap/maps/grfpw_net.vhd
 []
 [file]
  name = ../../lib/techmap/maps/mul_61x61.vhd
 []
 [file]
  name = ../../lib/techmap/maps/cpu_disas_net.vhd
 []
 [file]
  name = ../../lib/techmap/maps/grusbhc_net.vhd
 []
 [file]
  name = ../../lib/techmap/maps/ringosc.vhd
 []
 [file]
  name = ../../lib/techmap/maps/ssrctrl_net.vhd
 []
[]
[library]
name = spw
  [options]
   [booloption]
    name   = -autoorder
    value  = 0
    invert = 0
   []
  []
 [file]
  name = ../../lib/spw/comp/spwcomp.vhd
 []
 [file]
  name = ../../lib/spw/wrapper/grspw_gen.vhd
 []
[]
[library]
name = eth
  [options]
   [booloption]
    name   = -autoorder
    value  = 0
    invert = 0
   []
  []
 [file]
  name = ../../lib/eth/comp/ethcomp.vhd
 []
 [file]
  name = ../../lib/eth/core/greth_pkg.vhd
 []
 [file]
  name = ../../lib/eth/core/eth_rstgen.vhd
 []
 [file]
  name = ../../lib/eth/core/eth_ahb_mst.vhd
 []
 [file]
  name = ../../lib/eth/core/greth_tx.vhd
 []
 [file]
  name = ../../lib/eth/core/greth_rx.vhd
 []
 [file]
  name = ../../lib/eth/core/grethc.vhd
 []
 [file]
  name = ../../lib/eth/wrapper/greth_gen.vhd
 []
 [file]
  name = ../../lib/eth/wrapper/greth_gbit_gen.vhd
 []
[]
[library]
name = opencores
  [options]
   [booloption]
    name   = -autoorder
    value  = 0
    invert = 0
   []
  []
 [file]
  name = ../../lib/opencores/occomp/occomp.vhd
 []
 [file]
  name = ../../lib/opencores/can/cancomp.vhd
 []
 [file]
  name = ../../lib/opencores/can/can_top.vhd
 []
 [file]
  name = ../../lib/opencores/can/can_top_core_sync.vhd
 []
 [file]
  name = ../../lib/opencores/i2c/i2c_master_bit_ctrl.vhd
 []
 [file]
  name = ../../lib/opencores/i2c/i2c_master_byte_ctrl.vhd
 []
 [file]
  name = ../../lib/opencores/i2c/i2coc.vhd
 []
 [file]
  name = ../../lib/opencores/ata/ud_cnt.vhd
 []
 [file]
  name = ../../lib/opencores/ata/ro_cnt.vhd
 []
 [file]
  name = ../../lib/opencores/ata/atahost_dma_fifo.vhd
 []
 [file]
  name = ../../lib/opencores/ata/atahost_dma_actrl.vhd
 []
 [file]
  name = ../../lib/opencores/ata/atahost_dma_tctrl.vhd
 []
 [file]
  name = ../../lib/opencores/ata/atahost_pio_tctrl.vhd
 []
 [file]
  name = ../../lib/opencores/ata/atahost_pio_actrl.vhd
 []
 [file]
  name = ../../lib/opencores/ata/atahost_controller.vhd
 []
 [file]
  name = ../../lib/opencores/ata/atahost_pio_controller.vhd
 []
 [file]
  name = ../../lib/opencores/ata/ocidec2_controller.vhd
 []
[]
[library]
name = gaisler
  [options]
   [booloption]
    name   = -autoorder
    value  = 0
    invert = 0
   []
  []
 [file]
  name = ../../lib/gaisler/arith/arith.vhd
 []
 [file]
  name = ../../lib/gaisler/arith/mul32.vhd
 []
 [file]
  name = ../../lib/gaisler/arith/div32.vhd
 []
 [file]
  name = ../../lib/gaisler/memctrl/memctrl.vhd
 []
 [file]
  name = ../../lib/gaisler/memctrl/sdctrl.vhd
 []
 [file]
  name = ../../lib/gaisler/memctrl/sdmctrl.vhd
 []
 [file]
  name = ../../lib/gaisler/memctrl/srctrl.vhd
 []
 [file]
  name = ../../lib/gaisler/memctrl/spimctrl.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/leon3.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/reg_zero.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/mmuconfig.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/mmuiface.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/libmmu.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/libiu.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/libcache.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/libproc3.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/cachemem.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/mmu_icache.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/mmu_dcache.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/mmu_acache.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/mmutlbcam.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/mmulrue.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/mmulru.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/mmutlb.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/mmutw.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/mmu.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/mmu_cache.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/acache.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/dcache.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/icache.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/cache.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/cpu_disasx.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/grfpwx.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/mfpwx.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/grlfpwx.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/tbufmem.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/dsu3x.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/dsu3.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/proc3.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/leon3s.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/leon3cg.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/irqmp.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/grfpwxsh.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/grfpushwx.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/leon3sh.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/my_mux.vhd
 []
 [file]
  name = ../../lib/gaisler/leon3/top.vhd
 []
 [file]
  name = ../../lib/gaisler/can/can.vhd
 []
 [file]
  name = ../../lib/gaisler/can/can_mod.vhd
 []
 [file]
  name = ../../lib/gaisler/can/can_oc.vhd
 []
 [file]
  name = ../../lib/gaisler/can/can_mc.vhd
 []
 [file]
  name = ../../lib/gaisler/can/canmux.vhd
 []
 [file]
  name = ../../lib/gaisler/can/can_rd.vhd
 []
 [file]
  name = ../../lib/gaisler/misc/misc.vhd
 []
 [file]
  name = ../../lib/gaisler/misc/rstgen.vhd
 []
 [file]
  name = ../../lib/gaisler/misc/gptimer.vhd
 []
 [file]
  name = ../../lib/gaisler/misc/ahbram.vhd
 []
 [file]
  name = ../../lib/gaisler/misc/ahbtrace.vhd
 []
 [file]
  name = ../../lib/gaisler/misc/ahbmst.vhd
 []
 [file]
  name = ../../lib/gaisler/misc/grgpio.vhd
 []
 [file]
  name = ../../lib/gaisler/misc/ahbstat.vhd
 []
 [file]
  name = ../../lib/gaisler/misc/logan.vhd
 []
 [file]
  name = ../../lib/gaisler/misc/apbps2.vhd
 []
 [file]
  name = ../../lib/gaisler/misc/charrom_package.vhd
 []
 [file]
  name = ../../lib/gaisler/misc/charrom.vhd
 []
 [file]
  name = ../../lib/gaisler/misc/apbvga.vhd
 []
 [file]
  name = ../../lib/gaisler/misc/ahbdma.vhd
 []
 [file]
  name = ../../lib/gaisler/misc/svgactrl.vhd
 []
 [file]
  name = ../../lib/gaisler/misc/i2cmst.vhd
 []
 [file]
  name = ../../lib/gaisler/misc/spictrl.vhd
 []
 [file]
  name = ../../lib/gaisler/misc/i2cslv.vhd
 []
 [file]
  name = ../../lib/gaisler/misc/wild.vhd
 []
 [file]
  name = ../../lib/gaisler/misc/wild2ahb.vhd
 []
 [file]
  name = ../../lib/gaisler/net/net.vhd
 []
 [file]
  name = ../../lib/gaisler/uart/uart.vhd
 []
 [file]
  name = ../../lib/gaisler/uart/libdcom.vhd
 []
 [file]
  name = ../../lib/gaisler/uart/apbuart.vhd
 []
 [file]
  name = ../../lib/gaisler/uart/dcom.vhd
 []
 [file]
  name = ../../lib/gaisler/uart/dcom_uart.vhd
 []
 [file]
  name = ../../lib/gaisler/uart/ahbuart.vhd
 []
 [file]
  name = ../../lib/gaisler/sim/sim.vhd
 []
 [file]
  name = ../../lib/gaisler/sim/sram.vhd
 []
 [file]
  name = ../../lib/gaisler/sim/ata_device.vhd
 []
 [file]
  name = ../../lib/gaisler/sim/sram16.vhd
 []
 [file]
  name = ../../lib/gaisler/sim/phy.vhd
 []
 [file]
  name = ../../lib/gaisler/sim/ahbrep.vhd
 []
 [file]
  name = ../../lib/gaisler/jtag/jtag.vhd
 []
 [file]
  name = ../../lib/gaisler/jtag/libjtagcom.vhd
 []
 [file]
  name = ../../lib/gaisler/jtag/jtagcom.vhd
 []
 [file]
  name = ../../lib/gaisler/jtag/ahbjtag.vhd
 []
 [file]
  name = ../../lib/gaisler/jtag/ahbjtag_bsd.vhd
 []
 [file]
  name = ../../lib/gaisler/jtag/jtagtst.vhd
 []
 [file]
  name = ../../lib/gaisler/greth/ethernet_mac.vhd
 []
 [file]
  name = ../../lib/gaisler/greth/greth.vhd
 []
 [file]
  name = ../../lib/gaisler/greth/greth_gbit.vhd
 []
 [file]
  name = ../../lib/gaisler/greth/grethm.vhd
 []
 [file]
  name = ../../lib/gaisler/spacewire/spacewire.vhd
 []
 [file]
  name = ../../lib/gaisler/spacewire/grspw.vhd
 []
 [file]
  name = ../../lib/gaisler/spacewire/grspw2.vhd
 []
 [file]
  name = ../../lib/gaisler/spacewire/grspwm.vhd
 []
 [file]
  name = ../../lib/gaisler/usb/grusb.vhd
 []
 [file]
  name = ../../lib/gaisler/ata/ata.vhd
 []
 [file]
  name = ../../lib/gaisler/ata/ata_inf.vhd
 []
 [file]
  name = ../../lib/gaisler/ata/atahost_amba_slave.vhd
 []
 [file]
  name = ../../lib/gaisler/ata/atahost_ahbmst.vhd
 []
 [file]
  name = ../../lib/gaisler/ata/ocidec2_amba_slave.vhd
 []
 [file]
  name = ../../lib/gaisler/ata/atactrl_nodma.vhd
 []
 [file]
  name = ../../lib/gaisler/ata/atactrl_dma.vhd
 []
 [file]
  name = ../../lib/gaisler/ata/atactrl.vhd
 []
[]
[library]
name = esa
  [options]
   [booloption]
    name   = -autoorder
    value  = 0
    invert = 0
   []
  []
 [file]
  name = ../../lib/esa/memoryctrl/memoryctrl.vhd
 []
 [file]
  name = ../../lib/esa/memoryctrl/mctrl.vhd
 []
[]
[library]
name = micron
  [options]
   [booloption]
    name   = -autoorder
    value  = 0
    invert = 0
   []
  []
 [file]
  name = ../../lib/micron/sdram/components.vhd
 []
 [file]
  name = ../../lib/micron/sdram/mt48lc16m16a2.vhd
 []
[]
[library]
name = sonata
toplevel = testbench
  [options]
   [booloption]
    name   = -autoorder
    value  = 0
    invert = 0
   []
  []
 [file]
  name = ../../lib/work/debug/debug.vhd
 []
 [file]
  name = ../../lib/work/debug/grtestmod.vhd
 []
 [file]
  name = ../../lib/work/debug/cpu_disas.vhd
 []
 [file]
  name = config.vhd
 []
 [file]
  name = ahbrom.vhd
 []
 [file]
  name = vga_clkgen.vhd
 []
 [file]
  name = leon3mp.vhd
 []
 [file]
  name = testbench.vhd
 []
[]
[properties]
 work = sonata
[]