Subversion Repositories pcie_sg_dma

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-- Project    : Virtex-6 Integrated Block for PCI Express
-- File       : PIO_TO_CTRL.vhd
-- Version    : 1.7
--
-- Description: Turn-off Control Unit 
--               
--
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library ieee;
use ieee.std_logic_1164.all;
 
entity PIO_TO_CTRL  is port (
 
  clk                 : in std_logic;
  rst_n               : in std_logic;
 
  req_compl_i         : in std_logic;
  compl_done_i        : in std_logic;
 
  cfg_to_turnoff_n    : in std_logic;
  cfg_turnoff_ok_n    : out std_logic
 
 
);
 
end PIO_TO_CTRL;	 
 
 
 
architecture RTL of PIO_TO_CTRL is
 
signal trn_pending : std_logic;
 
begin
 
-- Check if completion is pending
 
process (clk, rst_n) 
 
begin
 
  if (rst_n = '0') then
 
    trn_pending <= '0';
 
  else
 
    if (clk'event and clk = '1') then
 
      if ((trn_pending = '0') and (req_compl_i = '1')) then
 
        trn_pending <= '1';
 
      elsif (compl_done_i =  '1') then
 
        trn_pending <= '0';
 
      end if;
 
    end if;
 
  end if;
 
end process;
 
 
--  Turn-off OK if requested and no transaction is pending
 
process (cfg_to_turnoff_n, trn_pending)
 
begin
 
  if ((cfg_to_turnoff_n = '0') and (trn_pending = '0')) then
 
    cfg_turnoff_ok_n <= '0';
 
  else 
 
    cfg_turnoff_ok_n <= '1';
 
  end if;
 
end process;		
 
end; -- PIO_TO_CTRL