Subversion Repositories pcie_sg_dma

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//-----------------------------------------------------------------------------
// Project    : Virtex-6 Integrated Block for PCI Express
// File       : sys_clk_gen.v
// Version    : 1.7
//--
//--------------------------------------------------------------------------------
`timescale 1ps/1ps
 
module sys_clk_gen (sys_clk);
 
output	sys_clk;
 
reg		sys_clk;
 
parameter        offset = 0;
parameter        halfcycle = 500;
 
initial begin
 
	sys_clk = 0;
	#(offset);
 
	forever #(halfcycle) sys_clk = ~sys_clk;
 
end
 
endmodule // sys_clk_gen