URL https://opencores.org/ocsvn/plb2wbbridge/plb2wbbridge/trunk

Subversion Repositories plb2wbbridge

[/] [plb2wbbridge/] [trunk/] [systems/] [test_system_sim/] [32bit_on_128bitPLB_asyn/] [system.xmp] - Rev 2

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#Please do not modify this file by hand
XmpVersion: 11.4
VerMgmt: 11.4
IntStyle: default
ModuleSearchPath: ../../EDK_Libs/
MHS File: system.mhs
MSS File: system.mss
Architecture: virtex5
Device: xc5vlx50
Package: ff676
SpeedGrade: -1
UserCmd1: 
UserCmd1Type: 0
UserCmd2: 
UserCmd2Type: 0
GenSimTB: 0
SdkExportBmmBit: 1
SdkExportDir: SDK/SDK_Export
InsertNoPads: 0
WarnForEAArch: 1
HdlLang: VHDL
SimModel: BEHAVIORAL
UcfFile: data/system.ucf
EnableParTimingError: 1
ShowLicenseDialog: 1

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Subversion Repositories plb2wbbridge

[/] [plb2wbbridge/] [trunk/] [systems/] [test_system_sim/] [32bit_on_128bitPLB_asyn/] [system.xmp] - Rev 2