Subversion Repositories pulse_processing_algorithm

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--
--    Copyright (C) 2011 Peter Lemmens, PANDA collaboration
--		p.j.j.lemmens@rug.nl
--    http://www-panda.gsi.de
--
--    As a reference, please use:
--    E. Guliyev, M. Kavatsyuk, P.J.J. Lemmens, G. Tambave, H. Loehner,
--    "VHDL Implementation of Feature-Extraction Algorithm for the PANDA Electromagnetic Calorimeter"
--    Nuclear Inst. and Methods in Physics Research, A ....
--
--
--    This program is free software; you can redistribute it and/or modify
--    it under the terms of the GNU Lesser General Public License as published by
--    the Free Software Foundation; either version 3 of the License, or
--    (at your option) any later version.
--
--    This program is distributed in the hope that it will be useful,
--    but WITHOUT ANY WARRANTY; without even the implied warranty of
--    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
--    GNU Lesser General Public License for more details.
--
--    You should have received a copy of the GNU General Public License
--    along with this program; if not, write to the Free Software
--    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111 USA
--
-----------------------------------------------------------------------------------------------
-- Company		:	KVI (Kernfysisch Versneller Instituut  -- Groningen, The Netherlands	
-- Author		:	P.J.J. Lemmens
-- Design Name	:	Feature Extraction
-- Module Name	:	control_feedback.vhd
-- Description	:	This module is for debugging purposes only.
--					Unused vme-registers are used to readback settings/signals  for basic debugging
--						
-----------------------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
 
entity control_feedback is
	port(	rst						: in	std_logic;
			ADclk						: in	std_logic;
			uPclk						: in	std_logic;
			cmd_output_select		: in	std_logic_vector(3 downto 0);
			buffersize				: in	std_logic_vector(31 downto 0);
			chain_enable			: in	std_logic;
			flowctrl_running		: in	std_logic;
			output_select_valid	: in	std_logic;
			fb_output_select		: out	std_logic_vector(3 downto 0);
			fb_buffersize			: out	std_logic_vector(31 downto 0);
			fb_chain_enable		: out	std_logic;
			fb_running				: out	std_logic;
			fb_output_valid		: out	std_logic
		);
end control_feedback;
 
architecture Behavioral of control_feedback is
 
   signal rst_S					: std_logic := '1';
   signal ADclk_S					: std_logic := '0';
   signal uPclk_S					: std_logic := '0';
 
   signal cmd_output_select_S	: std_logic_vector(3 downto 0)	:= (others => '0');
   signal buffersize_S			: std_logic_vector(31 downto 0)	:= (others => '0');
   signal chain_enable_S		: std_logic := '0';
   signal running_S				: std_logic := '0';
   signal output_valid_S		: std_logic := '0';
 
   signal fb_output_select_S	: std_logic_vector(3 downto 0)	:= (others => '0');
   signal fb_buffersize_S		: std_logic_vector(31 downto 0)	:= (others => '0');
   signal fb_chain_enable_S	: std_logic := '0';
   signal fb_running_S			: std_logic := '0';
   signal fb_output_valid_S	: std_logic := '0';
 
	begin
 
	rst_S						<= rst;
	ADclk_S					<= ADclk;
	uPclk_S					<= uPclk;
 
	AD_sync : process(ADclk_S)
	begin
		if rising_edge(ADclk_S) then
			cmd_output_select_S	<= cmd_output_select;
			buffersize_S			<= buffersize;
			chain_enable_S			<= chain_enable;
			running_S				<= flowctrl_running;
			output_valid_S			<= output_select_valid;
		end if;
	end process;
 
 
	feedback : process(uPclk_S, rst_S)
	begin
		if rising_edge(uPclk_S) then
			if (rst_S = '1') then
				fb_output_select		<= (others => '0');
				fb_buffersize			<= (others => '0');
				fb_chain_enable		<= '0';
				fb_running				<= '0';
				fb_output_valid		<= '0';
			else
				fb_output_select_S	<= cmd_output_select_S;
				fb_buffersize_S		<= buffersize_S;
				fb_chain_enable_S		<= chain_enable_S;
				fb_running_S			<= running_S;
				fb_output_valid_S		<= output_valid_S;
----------------------------------------------------------
				fb_output_select		<= fb_output_select_S;
				fb_buffersize			<= fb_buffersize_S;
				fb_chain_enable		<= fb_chain_enable_S;
				fb_running				<= fb_running_S;
				fb_output_valid		<= fb_output_valid_S;
			end if;
		end if;
	end process;
 
 
end Behavioral;