Subversion Repositories pulse_processing_algorithm

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--
--    Copyright (C) 2011 Peter Lemmens, PANDA collaboration
--		p.j.j.lemmens@rug.nl
--    http://www-panda.gsi.de
--
--    As a reference, please use:
--    E. Guliyev, M. Kavatsyuk, P.J.J. Lemmens, G. Tambave, H. Loehner,
--    "VHDL Implementation of Feature-Extraction Algorithm for the PANDA Electromagnetic Calorimeter"
--    Nuclear Inst. and Methods in Physics Research, A ....
--
--
--    This program is free software; you can redistribute it and/or modify
--    it under the terms of the GNU Lesser General Public License as published by
--    the Free Software Foundation; either version 3 of the License, or
--    (at your option) any later version.
--
--    This program is distributed in the hope that it will be useful,
--    but WITHOUT ANY WARRANTY; without even the implied warranty of
--    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
--    GNU Lesser General Public License for more details.
--
--    You should have received a copy of the GNU General Public License
--    along with this program; if not, write to the Free Software
--    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111 USA
--
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-- Company		:	KVI (Kernfysisch Versneller Instituut  -- Groningen, The Netherlands	
-- Author		:	P.J.J. Lemmens
-- Design Name	:	Feature Extraction
-- Module Name	:	sample_counter.vhd
-- Description	:	Simple time-stamt generator. Counts samples from reset.
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
 
 
entity sample_counter is
	Port (	rst				: in	STD_LOGIC;
				clk				: in	STD_LOGIC;
				enable			: in	STD_LOGIC := '1';
				sample_nr_out	: out STD_LOGIC_VECTOR
			);
end sample_counter;
 
architecture Behavioral of sample_counter is
 
	signal rst_S			: std_logic := '1';
	signal clk_S			: std_logic := '0';
	signal enable_S		: std_logic := '1';
	signal sample_nr_S	: std_logic_vector (47 downto 0);
 
	begin
 
	rst_S				<=	rst;
	clk_S				<=	clk;
	enable_S			<=	enable;
	sample_nr_out <= x"0000" & sample_nr_S;
 
	process(rst_S, clk_S, enable_S)
 
	begin
		if (clk_S'event and clk_S = '1') then
			if (rst_S = '1') then
				sample_nr_S	<=	x"000000000001";	--(others	=> '0');
			else
				if (enable_S = '1') then
					sample_nr_S <= sample_nr_S + 1;
				end if;
			end if;
		end if;
	end process;
 
end Behavioral;