Subversion Repositories sfpga

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<b><font size=+2 face="Helvetica, Arial" color=#bf0000>Project Name: OCRP-2</font></b>
<p>
<font size=+1><b>Description</b></font>
<p>OpenCores Reference Platform 2 (OCRP-2) is <i>full-size</i> length add-in PCI board. It includes two FPGA chips, video D/A and A/D converters, SDRAM memory, FLASH memory, PLD chip, USB, EIA232 and Ethernet PHY chips. It is designed for a debugging and verification process for several of our cores. See a block diagram for details.
<p>One special function of this board is to provide a method for a remote test of cores. The board will be used via web based interface. It will be possible to download design to the board and use a JAVA based logic analyzer and signal generator to debug a particular core. This interface will be similar to Hewlett Packard's 16550 Logic Analyzer which is possible to be used remotely via X session.
<p>Second possible use is to use it as a stand alone board. FPGAs are loaded via PC's printer port with centronics cable and external power supply must be provided.
<p>It is designed to be used as a base platform to port Linux, RTEMS and eCos operating systems to OpenRISC architecture and to write device drivers for our peripheral cores.
<p><center>
<img src="/cores/sfpga/sfpga_block.gif">
<br>
<i>Picture 1: Block diagaram</i>
</center>
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<font size=+1><b>Current Status</b></font>
<ul>
<li>preliminary design schematic is available as <a href="OCRP-2_sch_preliminary.pdf">Adobe PDF document</a> ~125 kb</li>
<li>or as <a href="ocrp-2_protel_sch.zip">Protel schematics</a> ~100 kb</li>
<li>currently working on PCI interface and FPGAs configuration schematics</li>
<li>the design files will be updated in the following days</li>
</ul>
<p>
<font size=+1><b>Acknowledgments</b></font>
<ul>
<li>thanks to all those who showed interest in the design so far, providing also support with new ideeas and links to component datasheets;</li>
<li>special thanks to <a href=mailto:woodyj@bitstream.net_NOSPAM>Woody Johnson</a> for his guidelines and hints regarding the Ethernet design part;</li>
<li>special thanks to <a href=mailto:wamnet@gte.net_NOSPAM>Wayne Mitzen</a> for his kind support with hints and tips in designing with Protel99.</li>
</ul>
<p>Maintainer/Author:
<ul><a href="/people/olupas/">Ovidiu Lupas</a></ul>
<p>Mailing-list:
<ul><a href=mailto:cores@opencores.org_NOSPAM>cores@opencores.org_NOSPAM</a></ul>
 
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