Subversion Repositories socgen

v 20100214 1
B 300 0  4200 2700 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 400 2850   5 10 1 1 0 0 1 1
device=core_def
T 400 3050 5 10 1 1 0 0 1 1
refdes=U?
T 400 3200    0 10 0 1 0 0 1 1
vendor=opencores.org
T 400 3200    0 10 0 1 0 0 1 1
library=Mos6502
T 400 3200    0 10 0 1 0 0 1 1
component=core
T 400 3200    0 10 0 1 0 0 1 1
version=def
P 300 200 0 200 10 1 1 
{
T 400 200 5 10 1 1 0 1 1 1
pinnumber=vec_int[7:0]
T 400 200 5 10 0 1 0 1 1 1
pinseq=1
}
P 300 400 0 400 10 1 1 
{
T 400 400 5 10 1 1 0 1 1 1
pinnumber=stk_pull_data[15:0]
T 400 400 5 10 0 1 0 1 1 1
pinseq=2
}
P 300 600 0 600 10 1 1 
{
T 400 600 5 10 1 1 0 1 1 1
pinnumber=rdata[15:0]
T 400 600 5 10 0 1 0 1 1 1
pinseq=3
}
P 300 800 0 800 10 1 1 
{
T 400 800 5 10 1 1 0 1 1 1
pinnumber=prog_data[15:0]
T 400 800 5 10 0 1 0 1 1 1
pinseq=4
}
P 300 1000 0 1000 10 1 1 
{
T 400 1000 5 10 1 1 0 1 1 1
pinnumber=pg0_data[7:0]
T 400 1000 5 10 0 1 0 1 1 1
pinseq=5
}
P 300 1200 0 1200 4 0 1  
{
T 400 1200 5 10 1 1 0 1 1 1 
pinnumber=reset
T 400 1200 5 10 0 1 0 1 1 1 
pinseq=6
}
P 300 1400 0 1400 4 0 1  
{
T 400 1400 5 10 1 1 0 1 1 1 
pinnumber=nmi
T 400 1400 5 10 0 1 0 1 1 1 
pinseq=7
}
P 300 1600 0 1600 4 0 1  
{
T 400 1600 5 10 1 1 0 1 1 1 
pinnumber=enable
T 400 1600 5 10 0 1 0 1 1 1 
pinseq=8
}
P 300 1800 0 1800 4 0 1  
{
T 400 1800 5 10 1 1 0 1 1 1 
pinnumber=clk
T 400 1800 5 10 0 1 0 1 1 1 
pinseq=9
}
P 4500 200 4800 200 10 1 1
{
T 4400 200 5  10 1 1 0 7 1 1 
pinnumber=wdata[7:0]
T 4400 200 5  10 0 1 0 7 1 1 
pinseq=10
}
P 4500 400 4800 400 10 1 1
{
T 4400 400 5  10 1 1 0 7 1 1 
pinnumber=stk_push_data[15:0]
T 4400 400 5  10 0 1 0 7 1 1 
pinseq=11
}
P 4500 600 4800 600 10 1 1
{
T 4400 600 5  10 1 1 0 7 1 1 
pinnumber=prog_counter[15:0]
T 4400 600 5  10 0 1 0 7 1 1 
pinseq=12
}
P 4500 800 4800 800 10 1 1
{
T 4400 800 5  10 1 1 0 7 1 1 
pinnumber=pg0_add[7:0]
T 4400 800 5  10 0 1 0 7 1 1 
pinseq=13
}
P 4500 1000 4800 1000 10 1 1
{
T 4400 1000 5  10 1 1 0 7 1 1 
pinnumber=alu_status[7:0]
T 4400 1000 5  10 0 1 0 7 1 1 
pinseq=14
}
P 4500 1200 4800 1200 10 1 1
{
T 4400 1200 5  10 1 1 0 7 1 1 
pinnumber=addr[15:0]
T 4400 1200 5  10 0 1 0 7 1 1 
pinseq=15
}
P 4500 1400 4800 1400 4 0 1
{
T 4400 1400 5  10 1 1 0 7 1 1
pinnumber=wr
T 4500 1400 5  10 0 1 0 7 1 1
pinseq=16
}
P 4500 1600 4800 1600 4 0 1
{
T 4400 1600 5  10 1 1 0 7 1 1
pinnumber=stk_push
T 4500 1600 5  10 0 1 0 7 1 1
pinseq=17
}
P 4500 1800 4800 1800 4 0 1
{
T 4400 1800 5  10 1 1 0 7 1 1
pinnumber=stk_pull
T 4500 1800 5  10 0 1 0 7 1 1
pinseq=18
}
P 4500 2000 4800 2000 4 0 1
{
T 4400 2000 5  10 1 1 0 7 1 1
pinnumber=rd
T 4500 2000 5  10 0 1 0 7 1 1
pinseq=19
}
P 4500 2200 4800 2200 4 0 1
{
T 4400 2200 5  10 1 1 0 7 1 1
pinnumber=pg0_wr
T 4500 2200 5  10 0 1 0 7 1 1
pinseq=20
}
P 4500 2400 4800 2400 4 0 1
{
T 4400 2400 5  10 1 1 0 7 1 1
pinnumber=pg0_rd
T 4500 2400 5  10 0 1 0 7 1 1
pinseq=21
}