Subversion Repositories socgen

v 20100214 1
B 300 0  4400 3100 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 400 3250   5 10 1 1 0 0 1 1
device=T6502_ctrl
T 400 3450 5 10 1 1 0 0 1 1
refdes=U?
T 400 3600    0 10 0 1 0 0 1 1
vendor=opencores.org
T 400 3600    0 10 0 1 0 0 1 1
library=Mos6502
T 400 3600    0 10 0 1 0 0 1 1
component=T6502
T 400 3600    0 10 0 1 0 0 1 1
version=ctrl
P 300 200 0 200 10 1 1 
{
T 400 200 5 10 1 1 0 1 1 1
pinnumber=timer_irq[1:0]
T 400 200 5 10 0 1 0 1 1 1
pinseq=1
}
P 300 400 0 400 10 1 1 
{
T 400 400 5 10 1 1 0 1 1 1
pinnumber=pg0_add[7:0]
T 400 400 5 10 0 1 0 1 1 1
pinseq=2
}
P 300 600 0 600 10 1 1 
{
T 400 600 5 10 1 1 0 1 1 1
pinnumber=mem_wdata[15:0]
T 400 600 5 10 0 1 0 1 1 1
pinseq=3
}
P 300 800 0 800 10 1 1 
{
T 400 800 5 10 1 1 0 1 1 1
pinnumber=mem_addr[0:0]
T 400 800 5 10 0 1 0 1 1 1
pinseq=4
}
P 300 1000 0 1000 10 1 1 
{
T 400 1000 5 10 1 1 0 1 1 1
pinnumber=ext_irq_in[2:0]
T 400 1000 5 10 0 1 0 1 1 1
pinseq=5
}
P 300 1200 0 1200 4 0 1  
{
T 400 1200 5 10 1 1 0 1 1 1 
pinnumber=tx_irq
T 400 1200 5 10 0 1 0 1 1 1 
pinseq=6
}
P 300 1400 0 1400 4 0 1  
{
T 400 1400 5 10 1 1 0 1 1 1 
pinnumber=rx_irq
T 400 1400 5 10 0 1 0 1 1 1 
pinseq=7
}
P 300 1600 0 1600 4 0 1  
{
T 400 1600 5 10 1 1 0 1 1 1 
pinnumber=ps2_data_avail
T 400 1600 5 10 0 1 0 1 1 1 
pinseq=8
}
P 300 1800 0 1800 4 0 1  
{
T 400 1800 5 10 1 1 0 1 1 1 
pinnumber=pg0_wr
T 400 1800 5 10 0 1 0 1 1 1 
pinseq=9
}
P 300 2000 0 2000 4 0 1  
{
T 400 2000 5 10 1 1 0 1 1 1 
pinnumber=pg0_rd
T 400 2000 5 10 0 1 0 1 1 1 
pinseq=10
}
P 300 2200 0 2200 4 0 1  
{
T 400 2200 5 10 1 1 0 1 1 1 
pinnumber=mem_wr
T 400 2200 5 10 0 1 0 1 1 1 
pinseq=11
}
P 300 2400 0 2400 4 0 1  
{
T 400 2400 5 10 1 1 0 1 1 1 
pinnumber=mem_rd
T 400 2400 5 10 0 1 0 1 1 1 
pinseq=12
}
P 300 2600 0 2600 4 0 1  
{
T 400 2600 5 10 1 1 0 1 1 1 
pinnumber=mem_cs
T 400 2600 5 10 0 1 0 1 1 1 
pinseq=13
}
P 300 2800 0 2800 4 0 1  
{
T 400 2800 5 10 1 1 0 1 1 1 
pinnumber=clk
T 400 2800 5 10 0 1 0 1 1 1 
pinseq=14
}
P 4700 200 5000 200 10 1 1
{
T 4600 200 5  10 1 1 0 7 1 1 
pinnumber=mem_rdata[15:0]
T 4600 200 5  10 0 1 0 7 1 1 
pinseq=15
}
P 4700 400 5000 400 10 1 1
{
T 4600 400 5  10 1 1 0 7 1 1 
pinnumber=io_module_vic_irq_in[7:0]
T 4600 400 5  10 0 1 0 7 1 1 
pinseq=16
}
P 4700 600 5000 600 10 1 1
{
T 4600 600 5  10 1 1 0 7 1 1 
pinnumber=io_module_pic_irq_in[7:0]
T 4600 600 5  10 0 1 0 7 1 1 
pinseq=17
}
P 4700 800 5000 800 10 1 1
{
T 4600 800 5  10 1 1 0 7 1 1 
pinnumber=cpu_pg0_data[7:0]
T 4600 800 5  10 0 1 0 7 1 1 
pinseq=18
}