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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [Mos6502/] [ip/] [T6502/] [sim/] [testbenches/] [xml/] [T6502_bfm.design.xml] - Rev 135

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<?xml version="1.0" encoding="UTF-8"?>
<!--
//                                                                        //
// Author : John Eaton  Ouabache Designworks                              //
//                                                                        //
//   Copyright (C) 2010 Authors and OPENCORES.ORG                         //
//                                                                        //
//   This source file may be used and distributed without                 //
//   restriction provided that this copyright statement is not            //
//   removed from the file and that any derivative work contains          //
//   the original copyright notice and the associated disclaimer.         //
//                                                                        //
//   This source file is free software; you can redistribute it           //
//   and/or modify it under the terms of the GNU Lesser General           //
//   Public License as published by the Free Software Foundation;         //
//   either version 2.1 of the License, or (at your option) any           //
//   later version.                                                       //
//                                                                        //
//   This source is distributed in the hope that it will be               //
//   useful, but WITHOUT ANY WARRANTY; without even the implied           //
//   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR              //
//   PURPOSE. See the GNU Lesser General Public License for more          //
//   details.                                                             //
//                                                                        //
//   You should have received a copy of the GNU Lesser General            //
//   Public License along with this source; if not, download it           //
//   from http://www.opencores.org/lgpl.shtml                             //
//                                                                        //
-->
<ipxact:design 
xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">

<ipxact:vendor>opencores.org</ipxact:vendor>
<ipxact:library>Mos6502</ipxact:library>
<ipxact:name>T6502</ipxact:name>
<ipxact:version>bfm.design</ipxact:version>  



<ipxact:vendorExtensions>
<socgen:nodes>

<socgen:node>
<ipxact:name>mem_addr</ipxact:name>
<ipxact:typeName>wire</ipxact:typeName>
<ipxact:wire><ipxact:vector><ipxact:left>CPU_ADD-1</ipxact:left><ipxact:right>0</ipxact:right></ipxact:vector></ipxact:wire>
</socgen:node>



</socgen:nodes>
</ipxact:vendorExtensions>







  <ipxact:adHocConnections>


    <ipxact:adHocConnection>
      <ipxact:name>clk</ipxact:name>
      <ipxact:externalPortReference portRef="clk"/>
      <ipxact:internalPortReference componentRef="fmc" portRef="clk"/>
      <ipxact:internalPortReference componentRef="uart_model"  portRef="clk"/>
      <ipxact:internalPortReference componentRef="ps2_model"  portRef="clk"/>
      <ipxact:internalPortReference componentRef="vga_model"  portRef="clk"/>
    </ipxact:adHocConnection>



    <ipxact:adHocConnection>
      <ipxact:name>reset</ipxact:name>
      <ipxact:externalPortReference portRef="reset"/>
      <ipxact:internalPortReference componentRef="fmc" portRef="reset"/>
      <ipxact:internalPortReference componentRef="uart_model" portRef="reset"/>
      <ipxact:internalPortReference componentRef="ps2_model" portRef="reset"/>
      <ipxact:internalPortReference componentRef="vga_model" portRef="reset"/>
    </ipxact:adHocConnection>



    <ipxact:adHocConnection>
      <ipxact:name>ext_addr</ipxact:name>
      <ipxact:externalPortReference portRef="ext_addr"/>
      <ipxact:internalPortReference componentRef="fmc" portRef="addr"/>
    </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>ext_wdata</ipxact:name>
      <ipxact:externalPortReference portRef="ext_wdata"/>
      <ipxact:internalPortReference componentRef="fmc" portRef="wdata"/>
    </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>ext_rdata</ipxact:name>
      <ipxact:externalPortReference portRef="ext_rdata"/>
      <ipxact:internalPortReference componentRef="fmc" portRef="rdata"/>
    </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>ext_ub</ipxact:name>
      <ipxact:externalPortReference portRef="ext_ub"/>
      <ipxact:internalPortReference componentRef="fmc" portRef="ub"/>
    </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>ext_wait</ipxact:name>
      <ipxact:externalPortReference portRef="ext_wait"/>
      <ipxact:internalPortReference componentRef="fmc" portRef="wait_out"/>
    </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>ext_lb</ipxact:name>
      <ipxact:externalPortReference portRef="ext_lb"/>
      <ipxact:internalPortReference componentRef="fmc" portRef="lb"/>
    </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>ext_rd</ipxact:name>
      <ipxact:externalPortReference portRef="ext_rd"/>
      <ipxact:internalPortReference componentRef="fmc" portRef="rd"/>
    </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>ext_stb</ipxact:name>
      <ipxact:externalPortReference portRef="ext_stb"/>
      <ipxact:internalPortReference componentRef="fmc" portRef="stb"/>
    </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>ext_wr</ipxact:name>
      <ipxact:externalPortReference portRef="ext_wr"/>
      <ipxact:internalPortReference componentRef="fmc" portRef="wr"/>
    </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>ext_cs</ipxact:name>
      <ipxact:externalPortReference portRef="ext_cs"/>
      <ipxact:internalPortReference componentRef="fmc" portRef="cs"/>
    </ipxact:adHocConnection>



    <ipxact:adHocConnection>
      <ipxact:name>memadr_out</ipxact:name>
      <ipxact:externalPortReference portRef="memadr_out" left="23" right="1" />
      <ipxact:internalPortReference componentRef="fmc" portRef="memadr_out"/>
    </ipxact:adHocConnection>


    <ipxact:adHocConnection>
      <ipxact:name>memdb_out</ipxact:name>
      <ipxact:externalPortReference portRef="memdb_out" left="15" right="0" />
      <ipxact:internalPortReference componentRef="fmc" portRef="memdb_out"/>
    </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>memdb_oe</ipxact:name>
      <ipxact:externalPortReference portRef="memdb_oe"/>
      <ipxact:internalPortReference componentRef="fmc" portRef="memdb_oe"/>
    </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>memdb_in</ipxact:name>
      <ipxact:externalPortReference portRef="memdb_in" left="15" right="0" />
      <ipxact:internalPortReference componentRef="fmc" portRef="memdb_in"/>
    </ipxact:adHocConnection>


   <ipxact:adHocConnection>
      <ipxact:name>MEMDB</ipxact:name>
      <ipxact:externalPortReference portRef="MEMDB"  left="15" right="0" />
      <ipxact:internalPortReference componentRef="memdb_pad" portRef="PAD"/>
      <ipxact:internalPortReference componentRef="psram"     portRef="dq"/>
    </ipxact:adHocConnection>



    <ipxact:adHocConnection>
      <ipxact:name>memdb_out</ipxact:name>
      <ipxact:externalPortReference portRef="memdb_out"/>
      <ipxact:internalPortReference componentRef="memdb_pad" portRef="pad_out"/>
    </ipxact:adHocConnection>
   

    <ipxact:adHocConnection>
      <ipxact:name>memdb_in</ipxact:name>
      <ipxact:externalPortReference portRef="memdb_in"/>
      <ipxact:internalPortReference componentRef="memdb_pad" portRef="pad_in"/>
    </ipxact:adHocConnection>
   
    <ipxact:adHocConnection>
      <ipxact:name>memdb_oe</ipxact:name>
      <ipxact:externalPortReference portRef="memdb_oe"/>
      <ipxact:internalPortReference componentRef="memdb_pad" portRef="pad_oe"/>
    </ipxact:adHocConnection>




    <ipxact:adHocConnection>
      <ipxact:name>ramclk_out</ipxact:name>
      <ipxact:externalPortReference portRef="ramclk_out"/>
      <ipxact:internalPortReference componentRef="fmc" portRef="ramclk_out"/>
      <ipxact:internalPortReference componentRef="psram" portRef="clk"/>
    </ipxact:adHocConnection>


    <ipxact:adHocConnection>
      <ipxact:name>ramadv_n_out</ipxact:name>
      <ipxact:externalPortReference portRef="ramadv_n_out"/>
      <ipxact:internalPortReference componentRef="fmc" portRef="ramadv_n_out"/>
      <ipxact:internalPortReference componentRef="psram" portRef="adv_n"/>
    </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>ramcre_out</ipxact:name>
      <ipxact:externalPortReference portRef="ramcre_out"/>
      <ipxact:internalPortReference componentRef="fmc" portRef="ramcre_out"/>
      <ipxact:internalPortReference componentRef="psram" portRef="cre"/>
    </ipxact:adHocConnection>


    <ipxact:adHocConnection>
      <ipxact:name>ramwait_in</ipxact:name>
      <ipxact:externalPortReference portRef="ramwait_in"/>
      <ipxact:internalPortReference componentRef="fmc" portRef="ramwait_in"/>
      <ipxact:internalPortReference componentRef="psram" portRef="o_wait"/>
    </ipxact:adHocConnection>


    <ipxact:adHocConnection>
      <ipxact:name>ramcs_n_out</ipxact:name>
      <ipxact:externalPortReference portRef="ramcs_n_out"/>
      <ipxact:internalPortReference componentRef="fmc" portRef="ramcs_n_out"/>
      <ipxact:internalPortReference componentRef="psram" portRef="ce_n"/>
    </ipxact:adHocConnection>



    <ipxact:adHocConnection>
      <ipxact:name>memoe_n_out</ipxact:name>
      <ipxact:externalPortReference portRef="memoe_n_out"/>
      <ipxact:internalPortReference componentRef="fmc" portRef="memoe_n_out"/>
      <ipxact:internalPortReference componentRef="psram" portRef="oe_n"/>
    </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>memwr_n_out</ipxact:name>
      <ipxact:externalPortReference portRef="memwr_n_out"/>
      <ipxact:internalPortReference componentRef="fmc" portRef="memwr_n_out"/>
      <ipxact:internalPortReference componentRef="psram" portRef="we_n"/>
    </ipxact:adHocConnection>



    <ipxact:adHocConnection>
      <ipxact:name>ramlb_n_out</ipxact:name>
      <ipxact:externalPortReference portRef="ramlb_n_out"/>
      <ipxact:internalPortReference componentRef="fmc" portRef="ramlb_n_out"/>
      <ipxact:internalPortReference componentRef="psram" portRef="lb_n"/>
    </ipxact:adHocConnection>


    <ipxact:adHocConnection>
      <ipxact:name>ramub_n_out</ipxact:name>
      <ipxact:externalPortReference portRef="ramub_n_out"/>
      <ipxact:internalPortReference componentRef="fmc" portRef="ramub_n_out"/>
      <ipxact:internalPortReference componentRef="psram" portRef="ub_n"/>
    </ipxact:adHocConnection>


    <ipxact:adHocConnection>
      <ipxact:name>memadr_out</ipxact:name>
      <ipxact:externalPortReference portRef="memadr_out" />
      <ipxact:internalPortReference componentRef="psram" portRef="addr"/>
    </ipxact:adHocConnection>






    <ipxact:adHocConnection>
      <ipxact:name>flashststs_in</ipxact:name>
      <ipxact:externalPortReference portRef="flashststs_in"/>
      <ipxact:internalPortReference componentRef="fmc" portRef="flashststs_in"/>
    </ipxact:adHocConnection>


    <ipxact:adHocConnection>
      <ipxact:name>flashrp_n_out</ipxact:name>
      <ipxact:externalPortReference portRef="flashrp_n_out"/>
      <ipxact:internalPortReference componentRef="fmc" portRef="flashrp_n_out"/>
    </ipxact:adHocConnection>


    <ipxact:adHocConnection>
      <ipxact:name>flashcs_n_out</ipxact:name>
      <ipxact:externalPortReference portRef="flashcs_n_out"/>
      <ipxact:internalPortReference componentRef="fmc" portRef="flashcs_n_out"/>
    </ipxact:adHocConnection>


    <ipxact:adHocConnection>
      <ipxact:name>ps2_clk_pad_oe</ipxact:name>
      <ipxact:externalPortReference portRef="ps2_clk_pad_oe"/>
       <ipxact:internalPortReference componentRef="ps2_clk_pad"   portRef="pad_oe"/>
    </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>ps2_clk_pad_in</ipxact:name>
      <ipxact:externalPortReference portRef="ps2_clk_pad_in"/>
       <ipxact:internalPortReference componentRef="ps2_clk_pad"   portRef="pad_in"/>
    </ipxact:adHocConnection>


    <ipxact:adHocConnection>
      <ipxact:name>ps2_data_pad_oe</ipxact:name>
      <ipxact:externalPortReference portRef="ps2_data_pad_oe"/>
       <ipxact:internalPortReference componentRef="ps2_data_pad"   portRef="pad_oe"/>
    </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>ps2_data_pad_in</ipxact:name>
      <ipxact:externalPortReference portRef="ps2_data_pad_in"/>
       <ipxact:internalPortReference componentRef="ps2_data_pad"   portRef="pad_in"/>
    </ipxact:adHocConnection>


     <ipxact:adHocConnection>
       <ipxact:name>uart_txd_pad_out</ipxact:name>
      <ipxact:externalPortReference portRef="uart_txd_pad_out"/>
       <ipxact:internalPortReference componentRef="uart_model" portRef="txd_in"/>
     </ipxact:adHocConnection>
 

      <ipxact:adHocConnection>
       <ipxact:name>uart_rxd_pad_in</ipxact:name>
      <ipxact:externalPortReference portRef="uart_rxd_pad_in"/>
       <ipxact:internalPortReference componentRef="uart_model" portRef="rxd_out"/>
     </ipxact:adHocConnection>




      <ipxact:adHocConnection>
       <ipxact:name>vga_vsync_n_pad_out</ipxact:name>
      <ipxact:externalPortReference portRef="vga_vsync_n_pad_out"/>
       <ipxact:internalPortReference componentRef="vga_model" portRef="vsync_n"/>
     </ipxact:adHocConnection>

      <ipxact:adHocConnection>
       <ipxact:name>vga_hsync_n_pad_out</ipxact:name>
      <ipxact:externalPortReference portRef="vga_hsync_n_pad_out"/>
       <ipxact:internalPortReference componentRef="vga_model" portRef="hsync_n"/>
     </ipxact:adHocConnection>


      <ipxact:adHocConnection>
       <ipxact:name>vga_red_pad_out</ipxact:name>
      <ipxact:externalPortReference portRef="vga_red_pad_out"/>
       <ipxact:internalPortReference componentRef="vga_model" portRef="red"/>
     </ipxact:adHocConnection>


      <ipxact:adHocConnection>
       <ipxact:name>vga_green_pad_out</ipxact:name>
      <ipxact:externalPortReference portRef="vga_green_pad_out"/>
       <ipxact:internalPortReference componentRef="vga_model" portRef="green"/>
     </ipxact:adHocConnection>

      <ipxact:adHocConnection>
       <ipxact:name>vga_blue_pad_out</ipxact:name>
      <ipxact:externalPortReference portRef="vga_blue_pad_out"/>
       <ipxact:internalPortReference componentRef="vga_model" portRef="blue"/>
     </ipxact:adHocConnection>









     <ipxact:adHocConnection>
       <ipxact:name>ps2_clk</ipxact:name>
      <ipxact:externalPortReference portRef="ps2_clk"/>
       <ipxact:internalPortReference componentRef="ps2_model" portRef="ps2_clk"/>
       <ipxact:internalPortReference componentRef="ps2_clk_pad"   portRef="PAD"/>
     </ipxact:adHocConnection>



     <ipxact:adHocConnection>
       <ipxact:name>ps2_data</ipxact:name>
      <ipxact:externalPortReference portRef="ps2_data"/>
       <ipxact:internalPortReference componentRef="ps2_model" portRef="ps2_data"/>
       <ipxact:internalPortReference componentRef="ps2_data_pad"   portRef="PAD"/>
     </ipxact:adHocConnection>





</ipxact:adHocConnections>




<ipxact:componentInstances>


<ipxact:componentInstance>
 <ipxact:instanceName>uart_model</ipxact:instanceName>
<ipxact:componentRef vendor="opencores.org" library="Testbench" name="uart_model" version="def"/>
 <ipxact:configurableElementValues>
 <ipxact:configurableElementValue referenceId="CLKCNT">UART_MODEL_CLKCNT</ipxact:configurableElementValue>
 <ipxact:configurableElementValue referenceId="SIZE">UART_MODEL_SIZE</ipxact:configurableElementValue>
</ipxact:configurableElementValues>
</ipxact:componentInstance>


<ipxact:componentInstance>
 <ipxact:instanceName>vga_model</ipxact:instanceName>
<ipxact:componentRef vendor="opencores.org" library="Testbench" name="vga_model" version="def"/>
</ipxact:componentInstance>



<ipxact:componentInstance>
 <ipxact:instanceName>ps2_model</ipxact:instanceName>
<ipxact:componentRef vendor="opencores.org" library="Testbench" name="ps2_model" version="def"/>
 <ipxact:configurableElementValues>
 <ipxact:configurableElementValue referenceId="CLKCNT">PS2_MODEL_CLKCNT</ipxact:configurableElementValue>
 <ipxact:configurableElementValue referenceId="SIZE">PS2_MODEL_SIZE</ipxact:configurableElementValue>

</ipxact:configurableElementValues>
</ipxact:componentInstance>



<ipxact:componentInstance>
 <ipxact:instanceName>ps2_clk_pad</ipxact:instanceName>
<ipxact:componentRef vendor="opencores.org" library="cde" name="pad" version="od_dig"/>
</ipxact:componentInstance>

<ipxact:componentInstance>
 <ipxact:instanceName>ps2_data_pad</ipxact:instanceName>
<ipxact:componentRef vendor="opencores.org" library="cde" name="pad" version="od_dig"/>
</ipxact:componentInstance>




<ipxact:componentInstance>
<ipxact:instanceName>fmc</ipxact:instanceName>
<ipxact:componentRef vendor="opencores.org" library="logic" name="flash_memcontrl" version="def"/>
</ipxact:componentInstance>



<ipxact:componentInstance>
<ipxact:instanceName>memdb_pad</ipxact:instanceName>
<ipxact:componentRef vendor="opencores.org" library="cde" name="pad" version="se_dig"/>
 <ipxact:configurableElementValues>
 <ipxact:configurableElementValue referenceId="WIDTH">16</ipxact:configurableElementValue>
</ipxact:configurableElementValues>
</ipxact:componentInstance>


<ipxact:componentInstance>
<ipxact:instanceName>psram</ipxact:instanceName>
<ipxact:componentRef vendor="opencores.org" library="Testbench" name="mt45w8mw12" version="def"/>
</ipxact:componentInstance>










</ipxact:componentInstances>













</ipxact:design>



   


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