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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [adv_debug_sys/] [Hardware/] [adv_dbg_if/] [sim/] [testbenches/] [xml/] [adv_dbg_if_wb_cpu0_duth.design.xml] - Rev 135

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<?xml version="1.0" encoding="UTF-8"?>
<!--           
//                                                                                                    //
// Generated File Do Not EDIT                                                                         //
//                                                                                                    //
// ./tools/verilog/gen_tb -vendor opencores.org -library adv_debug_sys  -component adv_dbg_if  -version wb_cpu0 //
//                                                                                                    //
-->           
<ipxact:design
xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">
<ipxact:vendor>opencores.org</ipxact:vendor>
<ipxact:library>adv_debug_sys</ipxact:library>
<ipxact:name>adv_dbg_if</ipxact:name>
<ipxact:version>wb_cpu0_duth.design</ipxact:version>
<ipxact:adHocConnections>

<ipxact:adHocConnection>
<ipxact:name>capture_dr_i</ipxact:name>
<ipxact:externalPortReference portRef="capture_dr_i" />
<ipxact:internalPortReference componentRef="dut" portRef="capture_dr_i" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>cpu0_ack_i</ipxact:name>
<ipxact:externalPortReference portRef="cpu0_ack_i" />
<ipxact:internalPortReference componentRef="dut" portRef="cpu0_ack_i" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>cpu0_addr_o</ipxact:name>
<ipxact:externalPortReference portRef="cpu0_addr_o" left="31" right="0" />
<ipxact:internalPortReference componentRef="dut" portRef="cpu0_addr_o" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>cpu0_bp_i</ipxact:name>
<ipxact:externalPortReference portRef="cpu0_bp_i" />
<ipxact:internalPortReference componentRef="dut" portRef="cpu0_bp_i" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>cpu0_clk_i</ipxact:name>
<ipxact:externalPortReference portRef="cpu0_clk_i" />
<ipxact:internalPortReference componentRef="dut" portRef="cpu0_clk_i" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>cpu0_data_i</ipxact:name>
<ipxact:externalPortReference portRef="cpu0_data_i" left="31" right="0" />
<ipxact:internalPortReference componentRef="dut" portRef="cpu0_data_i" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>cpu0_data_o</ipxact:name>
<ipxact:externalPortReference portRef="cpu0_data_o" left="31" right="0" />
<ipxact:internalPortReference componentRef="dut" portRef="cpu0_data_o" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>cpu0_rst_o</ipxact:name>
<ipxact:externalPortReference portRef="cpu0_rst_o" />
<ipxact:internalPortReference componentRef="dut" portRef="cpu0_rst_o" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>cpu0_stall_o</ipxact:name>
<ipxact:externalPortReference portRef="cpu0_stall_o" />
<ipxact:internalPortReference componentRef="dut" portRef="cpu0_stall_o" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>cpu0_stb_o</ipxact:name>
<ipxact:externalPortReference portRef="cpu0_stb_o" />
<ipxact:internalPortReference componentRef="dut" portRef="cpu0_stb_o" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>cpu0_we_o</ipxact:name>
<ipxact:externalPortReference portRef="cpu0_we_o" />
<ipxact:internalPortReference componentRef="dut" portRef="cpu0_we_o" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>debug_select_i</ipxact:name>
<ipxact:externalPortReference portRef="debug_select_i" />
<ipxact:internalPortReference componentRef="dut" portRef="debug_select_i" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>rst_i</ipxact:name>
<ipxact:externalPortReference portRef="rst_i" />
<ipxact:internalPortReference componentRef="dut" portRef="rst_i" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>shift_dr_i</ipxact:name>
<ipxact:externalPortReference portRef="shift_dr_i" />
<ipxact:internalPortReference componentRef="dut" portRef="shift_dr_i" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>tck_i</ipxact:name>
<ipxact:externalPortReference portRef="tck_i" />
<ipxact:internalPortReference componentRef="dut" portRef="tck_i" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>tdi_i</ipxact:name>
<ipxact:externalPortReference portRef="tdi_i" />
<ipxact:internalPortReference componentRef="dut" portRef="tdi_i" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>tdo_o</ipxact:name>
<ipxact:externalPortReference portRef="tdo_o" />
<ipxact:internalPortReference componentRef="dut" portRef="tdo_o" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>update_dr_i</ipxact:name>
<ipxact:externalPortReference portRef="update_dr_i" />
<ipxact:internalPortReference componentRef="dut" portRef="update_dr_i" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>wb_ack_i</ipxact:name>
<ipxact:externalPortReference portRef="wb_ack_i" />
<ipxact:internalPortReference componentRef="dut" portRef="wb_ack_i" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>wb_adr_o</ipxact:name>
<ipxact:externalPortReference portRef="wb_adr_o" left="31" right="0" />
<ipxact:internalPortReference componentRef="dut" portRef="wb_adr_o" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>wb_bte_o</ipxact:name>
<ipxact:externalPortReference portRef="wb_bte_o" left="1" right="0" />
<ipxact:internalPortReference componentRef="dut" portRef="wb_bte_o" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>wb_cab_o</ipxact:name>
<ipxact:externalPortReference portRef="wb_cab_o" />
<ipxact:internalPortReference componentRef="dut" portRef="wb_cab_o" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>wb_clk_i</ipxact:name>
<ipxact:externalPortReference portRef="wb_clk_i" />
<ipxact:internalPortReference componentRef="dut" portRef="wb_clk_i" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>wb_cti_o</ipxact:name>
<ipxact:externalPortReference portRef="wb_cti_o" left="2" right="0" />
<ipxact:internalPortReference componentRef="dut" portRef="wb_cti_o" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>wb_cyc_o</ipxact:name>
<ipxact:externalPortReference portRef="wb_cyc_o" />
<ipxact:internalPortReference componentRef="dut" portRef="wb_cyc_o" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>wb_dat_i</ipxact:name>
<ipxact:externalPortReference portRef="wb_dat_i" left="31" right="0" />
<ipxact:internalPortReference componentRef="dut" portRef="wb_dat_i" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>wb_dat_o</ipxact:name>
<ipxact:externalPortReference portRef="wb_dat_o" left="31" right="0" />
<ipxact:internalPortReference componentRef="dut" portRef="wb_dat_o" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>wb_err_i</ipxact:name>
<ipxact:externalPortReference portRef="wb_err_i" />
<ipxact:internalPortReference componentRef="dut" portRef="wb_err_i" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>wb_rst_i</ipxact:name>
<ipxact:externalPortReference portRef="wb_rst_i" />
<ipxact:internalPortReference componentRef="dut" portRef="wb_rst_i" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>wb_sel_o</ipxact:name>
<ipxact:externalPortReference portRef="wb_sel_o" left="3" right="0" />
<ipxact:internalPortReference componentRef="dut" portRef="wb_sel_o" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>wb_stb_o</ipxact:name>
<ipxact:externalPortReference portRef="wb_stb_o" />
<ipxact:internalPortReference componentRef="dut" portRef="wb_stb_o" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>wb_we_o</ipxact:name>
<ipxact:externalPortReference portRef="wb_we_o" />
<ipxact:internalPortReference componentRef="dut" portRef="wb_we_o" />
</ipxact:adHocConnection>


</ipxact:adHocConnections>
<ipxact:componentInstances>

<ipxact:componentInstance>
<ipxact:instanceName>dut</ipxact:instanceName>
<ipxact:componentRef vendor="opencores.org" library="adv_debug_sys" name="adv_dbg_if" version="wb_cpu0" />
<ipxact:configurableElementValues>
</ipxact:configurableElementValues>
</ipxact:componentInstance>
</ipxact:componentInstances>
</ipxact:design>

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