OpenCores
URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [fpgas/] [ip/] [Nexys2_T6502/] [sim/] [testbenches/] [verilog/] [sram.load] - Rev 135

Compare with Previous | Blame | View Log

parameter PREFIX ="../../../../../../../code/";   

initial
   begin
   if(      STARTUP  != "NONE") begin  $readmemh( {PREFIX,STARTUP}       ,dut.core.T6502.io_module.vga.vga_char_ctrl.char_ram.mem);end
   if(         FONT  != "NONE") begin  $readmemh( {PREFIX,FONT}          ,dut.core.T6502.io_module.vga.vga_char_ctrl.char_gen_rom.mem);end
   if(PROG_ROM_FILE  != "NONE") begin  $readmemh( {PREFIX,PROG_ROM_FILE} ,dut.core.T6502.cpu.prog_rom.mem);end
   if(PROG_ROM_FILE  != "NONE") begin  $readmemh( {PREFIX,PROG_ROM_FILE} ,dut.core.T6502.sh_prog_rom.mem );end
   if(     ROM_FILE  != "NONE") begin  $readmemh( {PREFIX,ROM_FILE}      ,dut.core.T6502.boot_rom.mem);end
   end

   

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.