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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [io/] [doc/] [sym/] [io_vic_def.sym] - Rev 135

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v 20100214 1
B 300 0  2600 2100 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 400 2250   5 10 1 1 0 0 1 1
device=io_vic_def
T 400 2450 5 10 1 1 0 0 1 1
refdes=U?
T 400 2600    0 10 0 1 0 0 1 1
vendor=opencores.org
T 400 2600    0 10 0 1 0 0 1 1
library=io
T 400 2600    0 10 0 1 0 0 1 1
component=io_vic
T 400 2600    0 10 0 1 0 0 1 1
version=def
P 300 200 0 200 10 1 1 
{
T 400 200 5 10 1 1 0 1 1 1
pinnumber=wdata[7:0]
T 400 200 5 10 0 1 0 1 1 1
pinseq=1
}
P 300 400 0 400 10 1 1 
{
T 400 400 5 10 1 1 0 1 1 1
pinnumber=int_in[7:0]
T 400 400 5 10 0 1 0 1 1 1
pinseq=2
}
P 300 600 0 600 10 1 1 
{
T 400 600 5 10 1 1 0 1 1 1
pinnumber=addr[3:0]
T 400 600 5 10 0 1 0 1 1 1
pinseq=3
}
P 300 800 0 800 4 0 1  
{
T 400 800 5 10 1 1 0 1 1 1 
pinnumber=wr
T 400 800 5 10 0 1 0 1 1 1 
pinseq=4
}
P 300 1000 0 1000 4 0 1  
{
T 400 1000 5 10 1 1 0 1 1 1 
pinnumber=reset
T 400 1000 5 10 0 1 0 1 1 1 
pinseq=5
}
P 300 1200 0 1200 4 0 1  
{
T 400 1200 5 10 1 1 0 1 1 1 
pinnumber=rd
T 400 1200 5 10 0 1 0 1 1 1 
pinseq=6
}
P 300 1400 0 1400 4 0 1  
{
T 400 1400 5 10 1 1 0 1 1 1 
pinnumber=enable
T 400 1400 5 10 0 1 0 1 1 1 
pinseq=7
}
P 300 1600 0 1600 4 0 1  
{
T 400 1600 5 10 1 1 0 1 1 1 
pinnumber=cs
T 400 1600 5 10 0 1 0 1 1 1 
pinseq=8
}
P 300 1800 0 1800 4 0 1  
{
T 400 1800 5 10 1 1 0 1 1 1 
pinnumber=clk
T 400 1800 5 10 0 1 0 1 1 1 
pinseq=9
}
P 2900 200 3200 200 10 1 1
{
T 2800 200 5  10 1 1 0 7 1 1 
pinnumber=vector[7:0]
T 2800 200 5  10 0 1 0 7 1 1 
pinseq=10
}
P 2900 400 3200 400 10 1 1
{
T 2800 400 5  10 1 1 0 7 1 1 
pinnumber=rdata[7:0]
T 2800 400 5  10 0 1 0 7 1 1 
pinseq=11
}
P 2900 600 3200 600 4 0 1
{
T 2800 600 5  10 1 1 0 7 1 1
pinnumber=irq_out
T 2900 600 5  10 0 1 0 7 1 1
pinseq=12
}

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