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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [io/] [ip/] [io_timer/] [sim/] [testbenches/] [xml/] [io_timer_def_duth.design.xml] - Rev 135

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<?xml version="1.0" encoding="UTF-8"?>
<!--           
//                                                                                                    //
// Generated File Do Not EDIT                                                                         //
//                                                                                                    //
// ./tools/verilog/gen_tb -vendor opencores.org -library io  -component io_timer  -version def //
//                                                                                                    //
-->           
<ipxact:design
xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">
<ipxact:vendor>opencores.org</ipxact:vendor>
<ipxact:library>io</ipxact:library>
<ipxact:name>io_timer</ipxact:name>
<ipxact:version>def_duth.design</ipxact:version>
<ipxact:adHocConnections>

<ipxact:adHocConnection>
<ipxact:name>addr</ipxact:name>
<ipxact:externalPortReference portRef="addr" left="3" right="0" />
<ipxact:internalPortReference componentRef="dut" portRef="addr" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>clk</ipxact:name>
<ipxact:externalPortReference portRef="clk" />
<ipxact:internalPortReference componentRef="dut" portRef="clk" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>cs</ipxact:name>
<ipxact:externalPortReference portRef="cs" />
<ipxact:internalPortReference componentRef="dut" portRef="cs" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>enable</ipxact:name>
<ipxact:externalPortReference portRef="enable" />
<ipxact:internalPortReference componentRef="dut" portRef="enable" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>irq</ipxact:name>
<ipxact:externalPortReference portRef="irq" left="TIMERS-1" right="0" />
<ipxact:internalPortReference componentRef="dut" portRef="irq" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>rd</ipxact:name>
<ipxact:externalPortReference portRef="rd" />
<ipxact:internalPortReference componentRef="dut" portRef="rd" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>rdata</ipxact:name>
<ipxact:externalPortReference portRef="rdata" left="7" right="0" />
<ipxact:internalPortReference componentRef="dut" portRef="rdata" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>reset</ipxact:name>
<ipxact:externalPortReference portRef="reset" />
<ipxact:internalPortReference componentRef="dut" portRef="reset" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>wdata</ipxact:name>
<ipxact:externalPortReference portRef="wdata" left="7" right="0" />
<ipxact:internalPortReference componentRef="dut" portRef="wdata" />
</ipxact:adHocConnection>

<ipxact:adHocConnection>
<ipxact:name>wr</ipxact:name>
<ipxact:externalPortReference portRef="wr" />
<ipxact:internalPortReference componentRef="dut" portRef="wr" />
</ipxact:adHocConnection>


</ipxact:adHocConnections>
<ipxact:componentInstances>

<ipxact:componentInstance>
<ipxact:instanceName>dut</ipxact:instanceName>
<ipxact:componentRef vendor="opencores.org" library="io" name="io_timer" version="def" />
<ipxact:configurableElementValues>
 <ipxact:configurableElementValue referenceId="TIMERS">TIMERS</ipxact:configurableElementValue>
</ipxact:configurableElementValues>
</ipxact:componentInstance>
</ipxact:componentInstances>
</ipxact:design>

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