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<?xml version="1.0" encoding="UTF-8"?>
<!--
//                                                                        //
// Author : John Eaton  Ouabache Designworks                              //
//                                                                        //
//   Copyright (C) 2010 Authors and OPENCORES.ORG                         //
//                                                                        //
//   This source file may be used and distributed without                 //
//   restriction provided that this copyright statement is not            //
//   removed from the file and that any derivative work contains          //
//   the original copyright notice and the associated disclaimer.         //
//                                                                        //
//   This source file is free software; you can redistribute it           //
//   and/or modify it under the terms of the GNU Lesser General           //
//   Public License as published by the Free Software Foundation;         //
//   either version 2.1 of the License, or (at your option) any           //
//   later version.                                                       //
//                                                                        //
//   This source is distributed in the hope that it will be               //
//   useful, but WITHOUT ANY WARRANTY; without even the implied           //
//   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR              //
//   PURPOSE. See the GNU Lesser General Public License for more          //
//   details.                                                             //
//                                                                        //
//   You should have received a copy of the GNU Lesser General            //
//   Public License along with this source; if not, download it           //
//   from http://www.opencores.org/lgpl.shtml                             //
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-->
<ipxact:design 
xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">

<ipxact:vendor>opencores.org</ipxact:vendor>
<ipxact:library>logic</ipxact:library>
<ipxact:name>flash_memcontrl</ipxact:name>
<ipxact:version>bfm.design</ipxact:version>  


     <ipxact:adHocConnections>


    <ipxact:adHocConnection>
      <ipxact:name>clk</ipxact:name>
      <ipxact:externalPortReference portRef="slave_clk_clk"/>
      <ipxact:internalPortReference componentRef="bus16" portRef="clk"/>
     </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>reset</ipxact:name>
      <ipxact:externalPortReference portRef="slave_reset_reset"/>
      <ipxact:internalPortReference componentRef="bus16" portRef="reset"/>
    </ipxact:adHocConnection>


    <ipxact:adHocConnection>
      <ipxact:name>Addr</ipxact:name>
      <ipxact:externalPortReference portRef="Addr"  left="23"  right="0"       />
      <ipxact:internalPortReference componentRef="bus16" portRef="addr"/>
    </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>wdata</ipxact:name>
      <ipxact:externalPortReference portRef="wdata"  left="15"  right="0"       />
      <ipxact:internalPortReference componentRef="bus16" portRef="wdata"/>
    </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>rdata</ipxact:name>
      <ipxact:externalPortReference portRef="rdata"  left="15"  right="0"       />
      <ipxact:internalPortReference componentRef="bus16" portRef="rdata"/>
    </ipxact:adHocConnection>



    <ipxact:adHocConnection>
      <ipxact:name>cs</ipxact:name>
      <ipxact:externalPortReference portRef="cs"        />
      <ipxact:internalPortReference componentRef="bus16" portRef="cs"/>
    </ipxact:adHocConnection>


    <ipxact:adHocConnection>
      <ipxact:name>rd</ipxact:name>
      <ipxact:externalPortReference portRef="rd"        />
      <ipxact:internalPortReference componentRef="bus16" portRef="rd"/>
    </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>wr</ipxact:name>
      <ipxact:externalPortReference portRef="wr"        />
      <ipxact:internalPortReference componentRef="bus16" portRef="wr"/>
    </ipxact:adHocConnection>


    <ipxact:adHocConnection>
      <ipxact:name>ub</ipxact:name>
      <ipxact:externalPortReference portRef="ub"        />
      <ipxact:internalPortReference componentRef="bus16" portRef="ub"/>
    </ipxact:adHocConnection>


    <ipxact:adHocConnection>
      <ipxact:name>lb</ipxact:name>
      <ipxact:externalPortReference portRef="lb"        />
      <ipxact:internalPortReference componentRef="bus16" portRef="lb"/>
    </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>memdb_out</ipxact:name>
      <ipxact:externalPortReference portRef="memdb_out"  left="15"  right="0"       />
      <ipxact:internalPortReference componentRef="memdb_buff" portRef="pad_out"/>
    </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>memdb_in</ipxact:name>
      <ipxact:externalPortReference portRef="memdb_in"  left="15"  right="0"       />
      <ipxact:internalPortReference componentRef="memdb_buff" portRef="pad_in"/>
    </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>memdb_io</ipxact:name>
      <ipxact:externalPortReference portRef="memdb_io"  left="15"  right="0"       />
      <ipxact:internalPortReference componentRef="memdb_buff" portRef="PAD"/>
      <ipxact:internalPortReference componentRef="psram" portRef="dq"/> 
   </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>memdb_oe</ipxact:name>
      <ipxact:externalPortReference portRef="memdb_oe"        />
      <ipxact:internalPortReference componentRef="memdb_buff" portRef="pad_oe"/>
    </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>ramclk_out</ipxact:name>
      <ipxact:externalPortReference portRef="ramclk_out"/>
      <ipxact:internalPortReference componentRef="psram" portRef="clk"/>
     </ipxact:adHocConnection>


    <ipxact:adHocConnection>
      <ipxact:name>ramadv_n_out</ipxact:name>
      <ipxact:externalPortReference portRef="ramadv_n_out"/>
      <ipxact:internalPortReference componentRef="psram" portRef="adv_n"/>
     </ipxact:adHocConnection>


    <ipxact:adHocConnection>
      <ipxact:name>ramcre_out</ipxact:name>
      <ipxact:externalPortReference portRef="ramcre_out"/>
      <ipxact:internalPortReference componentRef="psram" portRef="cre"/>
     </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>ramwait_n</ipxact:name>
      <ipxact:externalPortReference portRef="ramwait_n"/>
      <ipxact:internalPortReference componentRef="psram" portRef="o_wait"/>
     </ipxact:adHocConnection>


    <ipxact:adHocConnection>
      <ipxact:name>ramcs_n_out</ipxact:name>
      <ipxact:externalPortReference portRef="ramcs_n_out"/>
      <ipxact:internalPortReference componentRef="psram" portRef="ce_n"/>
     </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>memoe_n_out</ipxact:name>
      <ipxact:externalPortReference portRef="memoe_n_out"/>
      <ipxact:internalPortReference componentRef="psram" portRef="oe_n"/>
     </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>memwr_n_out</ipxact:name>
      <ipxact:externalPortReference portRef="memwr_n_out"/>
      <ipxact:internalPortReference componentRef="psram" portRef="we_n"/>
     </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>ramlb_n_out</ipxact:name>
      <ipxact:externalPortReference portRef="ramlb_n_out"/>
      <ipxact:internalPortReference componentRef="psram" portRef="lb_n"/>
     </ipxact:adHocConnection>

    <ipxact:adHocConnection>
      <ipxact:name>ramub_n_out</ipxact:name>
      <ipxact:externalPortReference portRef="ramub_n_out"/>
      <ipxact:internalPortReference componentRef="psram" portRef="ub_n"/>
     </ipxact:adHocConnection>


    <ipxact:adHocConnection>
      <ipxact:name>memadr_out</ipxact:name>
      <ipxact:externalPortReference portRef="memadr_out" left="23"  right="1"       />
      <ipxact:internalPortReference componentRef="psram" portRef="addr"/>
     </ipxact:adHocConnection>

     </ipxact:adHocConnections>

<ipxact:componentInstances>



<ipxact:componentInstance>
<ipxact:instanceName>psram</ipxact:instanceName> <ipxact:componentRef vendor="opencores.org" library="Testbench" name="mt45w8mw12" version="def" />
</ipxact:componentInstance>

<ipxact:componentInstance>
<ipxact:instanceName>bus16</ipxact:instanceName> <ipxact:componentRef vendor="opencores.org" library="Testbench" name="micro_bus16_model" version="def" />
</ipxact:componentInstance>


<ipxact:componentInstance>
<ipxact:instanceName>memdb_buff</ipxact:instanceName> <ipxact:componentRef vendor="opencores.org" library="cde" name="pad" version="se_dig" />
<ipxact:configurableElementValues>
 <ipxact:configurableElementValue referenceId="WIDTH">16</ipxact:configurableElementValue>
</ipxact:configurableElementValues>

</ipxact:componentInstance>







</ipxact:componentInstances>





</ipxact:design>