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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [logic/] [ip/] [micro_bus/] [sim/] [testbenches/] [xml/] [micro_bus_def_lint.xml] - Rev 135

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<?xml version="1.0" encoding="UTF-8"?>
<!--
//                                                                        //
// Author : John Eaton  Ouabache Designworks                              //
//                                                                        //
//   Copyright (C) 2010 Authors and OPENCORES.ORG                         //
//                                                                        //
//   This source file may be used and distributed without                 //
//   restriction provided that this copyright statement is not            //
//   removed from the file and that any derivative work contains          //
//   the original copyright notice and the associated disclaimer.         //
//                                                                        //
//   This source file is free software; you can redistribute it           //
//   and/or modify it under the terms of the GNU Lesser General           //
//   Public License as published by the Free Software Foundation;         //
//   either version 2.1 of the License, or (at your option) any           //
//   later version.                                                       //
//                                                                        //
//   This source is distributed in the hope that it will be               //
//   useful, but WITHOUT ANY WARRANTY; without even the implied           //
//   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR              //
//   PURPOSE. See the GNU Lesser General Public License for more          //
//   details.                                                             //
//                                                                        //
//   You should have received a copy of the GNU Lesser General            //
//   Public License along with this source; if not, download it           //
//   from http://www.opencores.org/lgpl.shtml                             //
//                                                                        //
-->
<ipxact:component 
xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">

<ipxact:vendor>opencores.org</ipxact:vendor>
<ipxact:library>logic</ipxact:library>
<ipxact:name>micro_bus</ipxact:name>
<ipxact:version>def_lint</ipxact:version>  




 

<ipxact:model>    


       <ipxact:views>



              <ipxact:view>
              <ipxact:name>Dut</ipxact:name>
              <ipxact:vendorExtensions>
              <ipxact:componentRef ipxact:vendor="opencores.org" 
                                   ipxact:library="logic" 
                                   ipxact:name="micro_bus" 
                                   ipxact:version="def_dut.params"/>
              </ipxact:vendorExtensions>
              </ipxact:view>





              <ipxact:view>
              <ipxact:name>lint</ipxact:name>
              <ipxact:envIdentifier>:*Lint:*</ipxact:envIdentifier>
              <ipxact:language>Verilog</ipxact:language>
              <ipxact:fileSetRef><ipxact:localName>fs-lint</ipxact:localName></ipxact:fileSetRef>
              </ipxact:view>



              <ipxact:view>
              <ipxact:name>rtl_check</ipxact:name>              
              <ipxact:vendorExtensions>
              <ipxact:componentRef ipxact:vendor="opencores.org" 
                                   ipxact:library="Testbench" 
                                   ipxact:name="toolflow" 
                                   ipxact:version="rtl_check"/> 
              </ipxact:vendorExtensions>
              </ipxact:view>

      </ipxact:views>



</ipxact:model>    







<ipxact:fileSets>



   <ipxact:fileSet>
      <ipxact:name>fs-lint</ipxact:name>

      <ipxact:file>
        <ipxact:logicalName></ipxact:logicalName>
        <ipxact:name>../verilog/lint/micro_bus_def_lint</ipxact:name>
        <ipxact:fileType>verilogSource</ipxact:fileType>
        <ipxact:userFileType>module</ipxact:userFileType>
      </ipxact:file>


   </ipxact:fileSet>





</ipxact:fileSets>







</ipxact:component>





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