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[/] [socgen/] [trunk/] [common/] [opencores.org/] [Busdefs/] [ext_bus/] [xml/] [ext_bus_def_rtl.abstractionDefinition.xml] - Rev 135

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<?xml version="1.0" encoding="UTF-8"?>
<!--
//                                                                        //
// Author : John Eaton  Ouabache Designworks                              //
//                                                                        //
//   Copyright (C) 2011 Authors and OPENCORES.ORG                         //
//                                                                        //
//   This source file may be used and distributed without                 //
//   restriction provided that this copyright statement is not            //
//   removed from the file and that any derivative work contains          //
//   the original copyright notice and the associated disclaimer.         //
//                                                                        //
//   This source file is free software; you can redistribute it           //
//   and/or modify it under the terms of the GNU Lesser General           //
//   Public License as published by the Free Software Foundation;         //
//   either version 2.1 of the License, or (at your option) any           //
//   later version.                                                       //
//                                                                        //
//   This source is distributed in the hope that it will be               //
//   useful, but WITHOUT ANY WARRANTY; without even the implied           //
//   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR              //
//   PURPOSE. See the GNU Lesser General Public License for more          //
//   details.                                                             //
//                                                                        //
//   You should have received a copy of the GNU Lesser General            //
//   Public License along with this source; if not, download it           //
//   from http://www.opencores.org/lgpl.shtml                             //
//                                                                        //
-->

<ipxact:abstractionDefinition 
xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">

<ipxact:vendor>opencores.org</ipxact:vendor>
<ipxact:library>Busdefs</ipxact:library>
<ipxact:name>ext_bus</ipxact:name>
<ipxact:version>rtl</ipxact:version>  

<ipxact:busType vendor="opencores.org" library="Busdefs" name="ext_bus" version="def"/>
  <ipxact:ports>

    <ipxact:port>
      <ipxact:logicalName>clk</ipxact:logicalName>
      <ipxact:wire>
        <ipxact:onMaster>
          <ipxact:direction>out</ipxact:direction>
        </ipxact:onMaster>
        <ipxact:onSlave>
          <ipxact:direction>in</ipxact:direction>
        </ipxact:onSlave>
      </ipxact:wire>
    </ipxact:port>

    <ipxact:port>
      <ipxact:logicalName>reset</ipxact:logicalName>
      <ipxact:wire>
        <ipxact:onMaster>
          <ipxact:direction>out</ipxact:direction>
        </ipxact:onMaster>
        <ipxact:onSlave>
          <ipxact:direction>in</ipxact:direction>
        </ipxact:onSlave>
      </ipxact:wire>
    </ipxact:port>

    <ipxact:port>
      <ipxact:logicalName>wdata</ipxact:logicalName>
      <ipxact:wire>
        <ipxact:onMaster>
          <ipxact:direction>out</ipxact:direction>
        </ipxact:onMaster>
        <ipxact:onSlave>
          <ipxact:direction>in</ipxact:direction>
        </ipxact:onSlave>
      </ipxact:wire>
    </ipxact:port>

    <ipxact:port>
      <ipxact:logicalName>rdata</ipxact:logicalName>
      <ipxact:wire>
        <ipxact:onMaster>
          <ipxact:direction>in</ipxact:direction>
        </ipxact:onMaster>
        <ipxact:onSlave>
          <ipxact:direction>out</ipxact:direction>
        </ipxact:onSlave>
      </ipxact:wire>
    </ipxact:port>



    <ipxact:port>
      <ipxact:logicalName>wait</ipxact:logicalName>
      <ipxact:wire>
        <ipxact:onMaster>
          <ipxact:direction>in</ipxact:direction>
        </ipxact:onMaster>
        <ipxact:onSlave>
          <ipxact:direction>out</ipxact:direction>
        </ipxact:onSlave>
      </ipxact:wire>
    </ipxact:port>


    <ipxact:port>
      <ipxact:logicalName>addr</ipxact:logicalName>
      <ipxact:wire>
        <ipxact:onMaster>
          <ipxact:direction>out</ipxact:direction>
        </ipxact:onMaster>
        <ipxact:onSlave>
          <ipxact:direction>in</ipxact:direction>
        </ipxact:onSlave>
      </ipxact:wire>
    </ipxact:port>

    <ipxact:port>
      <ipxact:logicalName>cs</ipxact:logicalName>
      <ipxact:wire>
        <ipxact:onMaster>
          <ipxact:direction>out</ipxact:direction>
        </ipxact:onMaster>
        <ipxact:onSlave>
          <ipxact:direction>in</ipxact:direction>
        </ipxact:onSlave>
      </ipxact:wire>
    </ipxact:port>




    <ipxact:port>
      <ipxact:logicalName>wr</ipxact:logicalName>
      <ipxact:wire>
        <ipxact:onMaster>
          <ipxact:direction>out</ipxact:direction>
        </ipxact:onMaster>
        <ipxact:onSlave>
          <ipxact:direction>in</ipxact:direction>
        </ipxact:onSlave>
      </ipxact:wire>
    </ipxact:port>



    <ipxact:port>
      <ipxact:logicalName>rd</ipxact:logicalName>
      <ipxact:wire>
        <ipxact:onMaster>
          <ipxact:direction>out</ipxact:direction>
        </ipxact:onMaster>
        <ipxact:onSlave>
          <ipxact:direction>in</ipxact:direction>
        </ipxact:onSlave>
      </ipxact:wire>
    </ipxact:port>






  </ipxact:ports>
</ipxact:abstractionDefinition>









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