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[/] [socgen/] [trunk/] [common/] [opencores.org/] [Testbench/] [bfms/] [uart_model/] [rtl/] [xml/] [uart_model_def.design.xml] - Rev 135

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<?xml version="1.0" encoding="UTF-8"?>
<!--
//                                                                        //
// Author : John Eaton  Ouabache Designworks                              //
//                                                                        //
//   Copyright (C) 2010 Authors and OPENCORES.ORG                         //
//                                                                        //
//   This source file may be used and distributed without                 //
//   restriction provided that this copyright statement is not            //
//   removed from the file and that any derivative work contains          //
//   the original copyright notice and the associated disclaimer.         //
//                                                                        //
//   This source file is free software; you can redistribute it           //
//   and/or modify it under the terms of the GNU Lesser General           //
//   Public License as published by the Free Software Foundation;         //
//   either version 2.1 of the License, or (at your option) any           //
//   later version.                                                       //
//                                                                        //
//   This source is distributed in the hope that it will be               //
//   useful, but WITHOUT ANY WARRANTY; without even the implied           //
//   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR              //
//   PURPOSE. See the GNU Lesser General Public License for more          //
//   details.                                                             //
//                                                                        //
//   You should have received a copy of the GNU Lesser General            //
//   Public License along with this source; if not, download it           //
//   from http://www.opencores.org/lgpl.shtml                             //
//                                                                        //
-->
<ipxact:design 
xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">

<ipxact:vendor>opencores.org</ipxact:vendor>
<ipxact:library>Testbench</ipxact:library>
<ipxact:name>uart_model</ipxact:name>
<ipxact:version>def.design</ipxact:version>  


<ipxact:vendorExtensions>

<socgen:nodes>




<socgen:node><ipxact:name>exp_rx_shift_buffer</ipxact:name>
<ipxact:typeName>reg</ipxact:typeName>
<ipxact:wire>
<ipxact:vector><ipxact:left>7</ipxact:left><ipxact:right>0</ipxact:right></ipxact:vector></ipxact:wire>
</socgen:node>


<socgen:node><ipxact:name>mask_rx_shift_buffer</ipxact:name>
<ipxact:typeName>reg</ipxact:typeName>
<ipxact:wire>
<ipxact:vector><ipxact:left>7</ipxact:left><ipxact:right>0</ipxact:right></ipxact:vector></ipxact:wire>
</socgen:node>



<socgen:node><ipxact:name>exp_rx_parity_err</ipxact:name>
<ipxact:typeName>reg</ipxact:typeName>
</socgen:node>


<socgen:node><ipxact:name>mask_rx_parity_err</ipxact:name>
<ipxact:typeName>reg</ipxact:typeName>
</socgen:node>


</socgen:nodes>

</ipxact:vendorExtensions>




<ipxact:adHocConnections>


    <ipxact:adHocConnection>
      <ipxact:name>clk</ipxact:name>
      <ipxact:externalPortReference portRef="slave_clk_clk"/>
      <ipxact:internalPortReference componentRef="rx_shift_buffer_prb" portRef="clk"/>
      <ipxact:internalPortReference componentRef="rx_parity_err_prb" portRef="clk"/>
    </ipxact:adHocConnection>



    <ipxact:adHocConnection>
      <ipxact:name>exp_rx_shift_buffer</ipxact:name>
      <ipxact:externalPortReference portRef="exp_rx_shift_buffer"   left="7"   right="0"     />
      <ipxact:internalPortReference componentRef="rx_shift_buffer_prb" portRef="expected_value"/>
    </ipxact:adHocConnection>


    <ipxact:adHocConnection>
      <ipxact:name>exp_rx_parity_err</ipxact:name>
      <ipxact:externalPortReference portRef="exp_rx_parity_err"        />
      <ipxact:internalPortReference componentRef="rx_parity_err_prb" portRef="expected_value"/>
    </ipxact:adHocConnection>


    <ipxact:adHocConnection>
      <ipxact:name>drv_rx_shift_buffer</ipxact:name>
      <ipxact:externalPortReference portRef="drv_rx_shift_buffer"   left="7"   right="0"     />
      <ipxact:internalPortReference componentRef="rx_shift_buffer_prb" portRef="drive_value"/>
    </ipxact:adHocConnection>


    <ipxact:adHocConnection>
      <ipxact:name>drv_rx_parity_err</ipxact:name>
      <ipxact:externalPortReference portRef="drv_rx_parity_err"        />
      <ipxact:internalPortReference componentRef="rx_parity_err_prb" portRef="drive_value"/>
    </ipxact:adHocConnection>



    <ipxact:adHocConnection>
      <ipxact:name>mask_rx_shift_buffer</ipxact:name>
      <ipxact:externalPortReference portRef="mask_rx_shift_buffer"   left="7"   right="0"     />
      <ipxact:internalPortReference componentRef="rx_shift_buffer_prb" portRef="mask"/>
    </ipxact:adHocConnection>


    <ipxact:adHocConnection>
      <ipxact:name>mask_rx_parity_err</ipxact:name>
      <ipxact:externalPortReference portRef="mask_rx_parity_err"        />
      <ipxact:internalPortReference componentRef="rx_parity_err_prb" portRef="mask"/>
    </ipxact:adHocConnection>





    <ipxact:adHocConnection>
      <ipxact:name>prb_rx_shift_buffer</ipxact:name>
      <ipxact:externalPortReference portRef="prb_rx_shift_buffer"   left="7"   right="0"     />
      <ipxact:internalPortReference componentRef="rx_shift_buffer_prb" portRef="signal"/>
    </ipxact:adHocConnection>


    <ipxact:adHocConnection>
      <ipxact:name>prb_rx_parity_err</ipxact:name>
      <ipxact:externalPortReference portRef="prb_rx_parity_err"        />
      <ipxact:internalPortReference componentRef="rx_parity_err_prb" portRef="signal"/>
    </ipxact:adHocConnection>



</ipxact:adHocConnections>



<ipxact:componentInstances>





<ipxact:componentInstance>
<ipxact:instanceName>rx_shift_buffer_prb</ipxact:instanceName> <ipxact:componentRef vendor="opencores.org" library="Testbench" name="io_probe" version="def" />
 <ipxact:configurableElementValues>
 <ipxact:configurableElementValue referenceId="WIDTH">8</ipxact:configurableElementValue>
 <ipxact:configurableElementValue referenceId="MESG">"uart data receive  Error"</ipxact:configurableElementValue>
</ipxact:configurableElementValues>
</ipxact:componentInstance>


<ipxact:componentInstance>
<ipxact:instanceName>rx_parity_err_prb</ipxact:instanceName> <ipxact:componentRef vendor="opencores.org" library="Testbench" name="io_probe" version="def" />
 <ipxact:configurableElementValues>
 <ipxact:configurableElementValue referenceId="WIDTH">1</ipxact:configurableElementValue>
 <ipxact:configurableElementValue referenceId="MESG">"uart parity Error"</ipxact:configurableElementValue>
</ipxact:configurableElementValues>
</ipxact:componentInstance>





</ipxact:componentInstances>
  

</ipxact:design>

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