Subversion Repositories socgen

v 20100214 1
B 300 0  4200 4500 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 400 4650   5 10 1 1 0 0 1 1
device=cde_jtag_tap
T 400 4850 5 10 1 1 0 0 1 1
refdes=U?
T 400 5000    0 10 0 1 0 0 1 1
vendor=opencores.org
T 400 5000    0 10 0 1 0 0 1 1
library=cde
T 400 5000    0 10 0 1 0 0 1 1
component=jtag
T 400 5000    0 10 0 1 0 0 1 1
version=tap
P 300 200 0 200 4 0 1  
{
T 400 200 5 10 1 1 0 1 1 1 
pinnumber=trst_n_pad_in
T 400 200 5 10 0 1 0 1 1 1 
pinseq=1
}
P 300 400 0 400 4 0 1  
{
T 400 400 5 10 1 1 0 1 1 1 
pinnumber=tms_pad_in
T 400 400 5 10 0 1 0 1 1 1 
pinseq=2
}
P 300 600 0 600 4 0 1  
{
T 400 600 5 10 1 1 0 1 1 1 
pinnumber=tdo_i
T 400 600 5 10 0 1 0 1 1 1 
pinseq=3
}
P 300 800 0 800 4 0 1  
{
T 400 800 5 10 1 1 0 1 1 1 
pinnumber=tdi_pad_in
T 400 800 5 10 0 1 0 1 1 1 
pinseq=4
}
P 300 1000 0 1000 4 0 1  
{
T 400 1000 5 10 1 1 0 1 1 1 
pinnumber=tclk_pad_in
T 400 1000 5 10 0 1 0 1 1 1 
pinseq=5
}
P 300 1200 0 1200 4 0 1  
{
T 400 1200 5 10 1 1 0 1 1 1 
pinnumber=bsr_tdo_i
T 400 1200 5 10 0 1 0 1 1 1 
pinseq=6
}
P 300 1400 0 1400 4 0 1  
{
T 400 1400 5 10 1 1 0 1 1 1 
pinnumber=aux_tdo_i
T 400 1400 5 10 0 1 0 1 1 1 
pinseq=7
}
P 4500 200 4800 200 4 0 1
{
T 4400 200 5  10 1 1 0 7 1 1
pinnumber=update_dr_o
T 4500 200 5  10 0 1 0 7 1 1
pinseq=8
}
P 4500 400 4800 400 4 0 1
{
T 4400 400 5  10 1 1 0 7 1 1
pinnumber=update_dr_clk_o
T 4500 400 5  10 0 1 0 7 1 1
pinseq=9
}
P 4500 600 4800 600 4 0 1
{
T 4400 600 5  10 1 1 0 7 1 1
pinnumber=test_logic_reset_o
T 4500 600 5  10 0 1 0 7 1 1
pinseq=10
}
P 4500 800 4800 800 4 0 1
{
T 4400 800 5  10 1 1 0 7 1 1
pinnumber=tdo_pad_out
T 4500 800 5  10 0 1 0 7 1 1
pinseq=11
}
P 4500 1000 4800 1000 4 0 1
{
T 4400 1000 5  10 1 1 0 7 1 1
pinnumber=tdo_pad_oe
T 4500 1000 5  10 0 1 0 7 1 1
pinseq=12
}
P 4500 1200 4800 1200 4 0 1
{
T 4400 1200 5  10 1 1 0 7 1 1
pinnumber=tdi_o
T 4500 1200 5  10 0 1 0 7 1 1
pinseq=13
}
P 4500 1400 4800 1400 4 0 1
{
T 4400 1400 5  10 1 1 0 7 1 1
pinnumber=tap_highz_mode
T 4500 1400 5  10 0 1 0 7 1 1
pinseq=14
}
P 4500 1600 4800 1600 4 0 1
{
T 4400 1600 5  10 1 1 0 7 1 1
pinnumber=shiftcapture_dr_clk_o
T 4500 1600 5  10 0 1 0 7 1 1
pinseq=15
}
P 4500 1800 4800 1800 4 0 1
{
T 4400 1800 5  10 1 1 0 7 1 1
pinnumber=shift_dr_o
T 4500 1800 5  10 0 1 0 7 1 1
pinseq=16
}
P 4500 2000 4800 2000 4 0 1
{
T 4400 2000 5  10 1 1 0 7 1 1
pinnumber=select_o
T 4500 2000 5  10 0 1 0 7 1 1
pinseq=17
}
P 4500 2200 4800 2200 4 0 1
{
T 4400 2200 5  10 1 1 0 7 1 1
pinnumber=jtag_clk
T 4500 2200 5  10 0 1 0 7 1 1
pinseq=18
}
P 4500 2400 4800 2400 4 0 1
{
T 4400 2400 5  10 1 1 0 7 1 1
pinnumber=capture_dr_o
T 4500 2400 5  10 0 1 0 7 1 1
pinseq=19
}
P 4500 2600 4800 2600 4 0 1
{
T 4400 2600 5  10 1 1 0 7 1 1
pinnumber=bsr_select_o
T 4500 2600 5  10 0 1 0 7 1 1
pinseq=20
}
P 4500 2800 4800 2800 4 0 1
{
T 4400 2800 5  10 1 1 0 7 1 1
pinnumber=bsr_output_mode
T 4500 2800 5  10 0 1 0 7 1 1
pinseq=21
}
P 4500 3000 4800 3000 4 0 1
{
T 4400 3000 5  10 1 1 0 7 1 1
pinnumber=aux_update_dr_clk_o
T 4500 3000 5  10 0 1 0 7 1 1
pinseq=22
}
P 4500 3200 4800 3200 4 0 1
{
T 4400 3200 5  10 1 1 0 7 1 1
pinnumber=aux_test_logic_reset_o
T 4500 3200 5  10 0 1 0 7 1 1
pinseq=23
}
P 4500 3400 4800 3400 4 0 1
{
T 4400 3400 5  10 1 1 0 7 1 1
pinnumber=aux_tdi_o
T 4500 3400 5  10 0 1 0 7 1 1
pinseq=24
}
P 4500 3600 4800 3600 4 0 1
{
T 4400 3600 5  10 1 1 0 7 1 1
pinnumber=aux_shiftcapture_dr_clk_o
T 4500 3600 5  10 0 1 0 7 1 1
pinseq=25
}
P 4500 3800 4800 3800 4 0 1
{
T 4400 3800 5  10 1 1 0 7 1 1
pinnumber=aux_shift_dr_o
T 4500 3800 5  10 0 1 0 7 1 1
pinseq=26
}
P 4500 4000 4800 4000 4 0 1
{
T 4400 4000 5  10 1 1 0 7 1 1
pinnumber=aux_select_o
T 4500 4000 5  10 0 1 0 7 1 1
pinseq=27
}
P 4500 4200 4800 4200 4 0 1
{
T 4400 4200 5  10 1 1 0 7 1 1
pinnumber=aux_capture_dr_o
T 4500 4200 5  10 0 1 0 7 1 1
pinseq=28
}