OpenCores
URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [common/] [opencores.org/] [cde/] [ip/] [sram/] [doc/] [sym/] [cde_sram_byte.sym] - Rev 135

Compare with Previous | Blame | View Log

v 20100214 1
B 300 0  2800 1700 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 400 1850   5 10 1 1 0 0 1 1
device=cde_sram_byte
T 400 2050 5 10 1 1 0 0 1 1
refdes=U?
T 400 2200    0 10 0 1 0 0 1 1
vendor=opencores.org
T 400 2200    0 10 0 1 0 0 1 1
library=cde
T 400 2200    0 10 0 1 0 0 1 1
component=sram
T 400 2200    0 10 0 1 0 0 1 1
version=byte
P 300 200 0 200 10 1 1 
{
T 400 200 5 10 1 1 0 1 1 1
pinnumber=wdata[7:0]
T 400 200 5 10 0 1 0 1 1 1
pinseq=1
}
P 300 400 0 400 10 1 1 
{
T 400 400 5 10 1 1 0 1 1 1
pinnumber=addr[ADDR-1:0]
T 400 400 5 10 0 1 0 1 1 1
pinseq=2
}
P 300 600 0 600 4 0 1  
{
T 400 600 5 10 1 1 0 1 1 1 
pinnumber=wr
T 400 600 5 10 0 1 0 1 1 1 
pinseq=3
}
P 300 800 0 800 4 0 1  
{
T 400 800 5 10 1 1 0 1 1 1 
pinnumber=rd
T 400 800 5 10 0 1 0 1 1 1 
pinseq=4
}
P 300 1000 0 1000 4 0 1  
{
T 400 1000 5 10 1 1 0 1 1 1 
pinnumber=cs
T 400 1000 5 10 0 1 0 1 1 1 
pinseq=5
}
P 300 1200 0 1200 4 0 1  
{
T 400 1200 5 10 1 1 0 1 1 1 
pinnumber=clk
T 400 1200 5 10 0 1 0 1 1 1 
pinseq=6
}
P 300 1400 0 1400 4 0 1  
{
T 400 1400 5 10 1 1 0 1 1 1 
pinnumber=be
T 400 1400 5 10 0 1 0 1 1 1 
pinseq=7
}
P 3100 200 3400 200 10 1 1
{
T 3000 200 5  10 1 1 0 7 1 1 
pinnumber=rdata[7:0]
T 3000 200 5  10 0 1 0 7 1 1 
pinseq=8
}

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.