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[/] [sport/] [trunk/] [syn/] [xilinx/] [ise/] [sport_top/] [sport_top.twx] - Rev 7

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<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE twReport [
<!ELEMENT twReport (twHead?, (twWarn | twDebug | twInfo)*, twBody, twSum?,
                                        twDebug*, twFoot?, twClientInfo?)>
<!ATTLIST twReport version CDATA "10,4">
<!ELEMENT twHead (twExecVer?, twCopyright, twCmdLine?, twDesign?, twPCF?, twDevInfo, twRptInfo, twEnvVar*)>
<!ELEMENT twExecVer (#PCDATA)>
<!ELEMENT twCopyright (#PCDATA)>
<!ELEMENT twCmdLine (#PCDATA)>
<!ELEMENT twDesign (#PCDATA)>
<!ELEMENT twPCF (#PCDATA)>
<!ELEMENT twDevInfo (twDevName, twSpeedGrade, twSpeedVer?)>
<!ELEMENT twDevName (#PCDATA)>
<!ATTLIST twDevInfo arch CDATA #IMPLIED pkg CDATA #IMPLIED>
<!ELEMENT twSpeedGrade (#PCDATA)>
<!ELEMENT twSpeedVer (#PCDATA)>
<!ELEMENT twRptInfo (twItemLimit?, (twUnconst, twUnconstLimit?)?)>
<!ATTLIST twRptInfo twRptLvl (twErr | twVerbose | twTerseErr | twSum | twTimeGrp) #REQUIRED>
<!ATTLIST twRptInfo twAdvRpt  (TRUE | FALSE) "FALSE">
<!ATTLIST twRptInfo twTimeUnits (twPsec | twNsec | twUsec | twMsec | twSec) "twNsec">
<!ATTLIST twRptInfo twFreqUnits (twGHz | twMHz | twHz) "twMHz">
<!ATTLIST twRptInfo twReportMinPaths CDATA #IMPLIED>
<!ELEMENT twItemLimit (#PCDATA)>
<!ELEMENT twUnconst EMPTY>
<!ELEMENT twUnconstLimit (#PCDATA)>
<!ELEMENT twEnvVar EMPTY>
<!ATTLIST twEnvVar name CDATA #REQUIRED>
<!ATTLIST twEnvVar description CDATA #REQUIRED>
<!ELEMENT twWarn (#PCDATA)>
<!ELEMENT twInfo (#PCDATA)>
<!ELEMENT twDebug (#PCDATA)>
<!ELEMENT twBody (twDerating?, (twSumRpt | twVerboseRpt | twErrRpt | twTerseErrRpt | twTimeGrpRpt), twNonDedClks?)>
<!ATTLIST twBody twFastPaths CDATA #IMPLIED>
<!ELEMENT twDerating (twProc?, twTemp?, twVolt?)>
<!ELEMENT twProc (#PCDATA)>
<!ELEMENT twTemp (#PCDATA)>
<!ELEMENT twVolt (#PCDATA)>
<!ELEMENT twSumRpt (twConstRollupTable*, twConstList?, twConstSummaryTable?, twUnmetConstCnt?, (twWarn | twInfo | twDebug)*, twDataSheet?)>
<!ELEMENT twErrRpt (twCycles?, (twConst | twTIG |  twConstRollupTable)*, twUnmetConstCnt?, (twWarn | twInfo | twDebug)*, twDataSheet?, twTimeGrp*)>
<!ELEMENT twTerseErrRpt (twConstList, twUnmetConstCnt?, twDataSheet?)>
<!ELEMENT twVerboseRpt (twCycles?, (twConst | twTIG | twConstRollupTable)*, twUnmetConstCnt?, (twWarn | twInfo | twDebug)*, twDataSheet?, twTimeGrp*)> 
<!ELEMENT twCycles (twSigConn+)>
<!ATTLIST twCycles twNum CDATA #REQUIRED>
<!ELEMENT twSigConn (twSig, twDriver, twLoad)>
<!ELEMENT twSig (#PCDATA)>
<!ELEMENT twDriver (#PCDATA)>
<!ELEMENT twLoad (#PCDATA)> 
<!ELEMENT twConst (twConstHead, ((twPathRpt?,twRacePathRpt?, twPathRptBanner?)* |  (twPathRpt*, twRacePathRpt?) |  twNetRpt* | twClkSkewLimit*))>
<!ATTLIST twConst twConstType (NET | 
                                                           NETDELAY | 
                                                           NETSKEW | 
                                                           PATH |
                                                           DEFPERIOD |
                                                           UNCONSTPATH |
                                                           DEFPATH | 
                                                           PATH2SETUP |
                                                           UNCONSTPATH2SETUP | 
                                                           PATHCLASS | 
                                                           PATHDELAY | 
                                                           PERIOD |
                                                           FREQUENCY |
                                                           PATHBLOCK |
                                                           OFFSET |
                                                           OFFSETIN |
                                                           OFFSETINCLOCK | 
                                                           UNCONSTOFFSETINCLOCK |
                                                           OFFSETINDELAY |
                                                           OFFSETINMOD |
                                                           OFFSETOUT |
                                                           OFFSETOUTCLOCK |
                                                           UNCONSTOFFSETOUTCLOCK | 
                                                           OFFSETOUTDELAY |
                                                           OFFSETOUTMOD| CLOCK_SKEW_LIMITS) #IMPLIED> 
<!ELEMENT twConstHead (twConstName, twItemCnt, twErrCntSetup, twErrCntEndPt?, twErrCntHold,
                                           twEndPtCnt?,
                                           twPathErrCnt?, (twMinPer| twMaxDel| twMaxFreq| twMaxNetDel| twMaxNetSkew| twMinOff| twMaxOff)*)>
<!ELEMENT twConstName (#PCDATA)>
<!ATTLIST twConstName UCFConstName CDATA #IMPLIED>
<!ATTLIST twConstHead uID CDATA #IMPLIED>
<!ELEMENT twItemCnt (#PCDATA)>
<!ELEMENT twErrCnt (#PCDATA)>
<!ELEMENT twErrCntEndPt (#PCDATA)>
<!ELEMENT twErrCntSetup (#PCDATA)>
<!ELEMENT twErrCntHold (#PCDATA)>
<!ATTLIST twErrCntHold twRaceChecked (TRUE | FALSE) "FALSE">
<!ELEMENT twEndPtCnt (#PCDATA)>
<!ELEMENT twPathErrCnt (#PCDATA)>
<!ELEMENT twMinPer (#PCDATA) >
<!ELEMENT twFootnote EMPTY>
<!ATTLIST twFootnote number CDATA #REQUIRED>
<!ELEMENT twMaxDel (#PCDATA)>
<!ELEMENT twMaxFreq (#PCDATA)>
<!ELEMENT twMinOff (#PCDATA)>
<!ELEMENT twMaxOff (#PCDATA)>
<!ELEMENT twTIG (twTIGHead, (twPathRpt*,twRacePathRpt?))>
<!ELEMENT twTIGHead (twTIGName, twInstantiated, twBlocked)>
<!ELEMENT twTIGName (#PCDATA)>
<!ELEMENT twInstantiated (#PCDATA)>
<!ELEMENT twBlocked (#PCDATA)>
<!ELEMENT twRacePathRpt (twRacePath+)>
<!ELEMENT twPathRpt (twUnconstPath | twConstPath | twUnconstOffIn | twConstOffIn | twUnconstOffOut | twConstOffOut | twModOffOut)>
<!ELEMENT twUnconstPath (twTotDel, twSrc, twDest,  (twDel, twSUTime)?, twTotPathDel?, twClkSkew?, tw2Phase?, twClkUncert?, twDetPath?)>
<!ATTLIST twUnconstPath twDataPathType CDATA #IMPLIED
                                                twSimpleMinPath CDATA #IMPLIED>
<!ELEMENT twTotDel (#PCDATA)>
<!ELEMENT twSrc (#PCDATA)>
<!ATTLIST twSrc BELType CDATA #IMPLIED>
<!ELEMENT twDest (#PCDATA)>
<!ATTLIST twDest BELType CDATA #IMPLIED>
<!ELEMENT twDel (#PCDATA)>
<!ELEMENT twSUTime (#PCDATA)>
<!ELEMENT twTotPathDel (#PCDATA)>
<!ELEMENT twClkSkew (#PCDATA)>
<!ATTLIST twClkSkew dest CDATA #IMPLIED src CDATA #IMPLIED>
<!ELEMENT twConstPath (twSlack, twSrc, twDest, twTotPathDel?, twClkSkew?, twDelConst, tw2Phase?, twClkUncert?, twDetPath?)>
<!ATTLIST twConstPath twDataPathType CDATA "twDataPathMaxDelay">
<!ATTLIST twConstPath constType (period | fromto | unknown) "unknown">
<!ELEMENT twSlack (#PCDATA)>
<!ELEMENT twDelConst (#PCDATA)>
<!ELEMENT tw2Phase EMPTY>
<!ELEMENT twClkUncert (#PCDATA)>
<!ATTLIST twClkUncert fSysJit CDATA #IMPLIED  fInputJit CDATA #IMPLIED
                                          fDCMJit CDATA #IMPLIED
                                          fPhaseErr CDATA #IMPLIED
                                          sEqu CDATA #IMPLIED>
<!ELEMENT twRacePath (twSlack, twSrc, twDest, twClkSkew, twDelConst?, twClkUncert?, twDetPath)>
<!ELEMENT twPathRptBanner (#PCDATA)>
<!ATTLIST twPathRptBanner sType CDATA #IMPLIED iPaths CDATA #IMPLIED iCriticalPaths CDATA #IMPLIED>
<!ELEMENT twUnconstOffIn (twOff, twSrc, twDest, twGuaranteed?, twClkUncert?, (twDataPath, twClkPath)?)>
<!ATTLIST twUnconstOffIn twDataPathType CDATA #IMPLIED>
<!ELEMENT twOff (#PCDATA)>
<!ELEMENT twGuaranteed EMPTY>
<!ELEMENT twConstOffIn (twSlack, twSrc, twDest, ((twClkDel, twClkSrc, twClkDest) | twGuarInSetup), twOff, twOffSrc, twOffDest, twClkUncert?, (twDataPath, twClkPath)?)>
<!ATTLIST twConstOffIn twDataPathType CDATA "twDataPathMaxDelay">
<!ATTLIST twConstOffIn twDurationNotSpecified CDATA #IMPLIED>
<!ELEMENT twClkDel (#PCDATA)>
<!ELEMENT twClkSrc (#PCDATA)>
<!ELEMENT twClkDest (#PCDATA)>
<!ELEMENT twGuarInSetup (#PCDATA)>
<!ELEMENT twOffSrc (#PCDATA)>
<!ELEMENT twOffDest (#PCDATA)>
<!ELEMENT twUnconstOffOut (twOff, twSrc, twDest, twClkUncert?, (twClkPath, twDataPath)?)>
<!ATTLIST twUnconstOffOut twDataPathType CDATA #IMPLIED>
<!ELEMENT twConstOffOut (twSlack, twSrc, twDest, twClkDel, twClkSrc, twClkDest, twDataDel, twDataSrc, twDataDest, twOff, twOffSrc, twOffDest, twClkUncert?, (twClkPath, twDataPath)?)>
<!ATTLIST twConstOffOut twDataPathType CDATA "twDataPathMaxDelay">
<!ELEMENT twDataDel (#PCDATA)>
<!ELEMENT twDataSrc (#PCDATA)>
<!ELEMENT twDataDest (#PCDATA)>
<!ELEMENT twModOffOut (twSlack, twDest, twDataDel, twDataSrc, twDataDest, twClkUncert?, twDataPath?)>
<!ELEMENT twDetPath (twSrc, twDest, twLogLvls, twSrcSite, twSrcClk?, twPathDel*, (twLogDel, twRouteDel, twTotDel)?, twDestClk?, (twPctLog, twPctRoute)?)>
<!ATTLIST twDetPath maxSiteLen CDATA #IMPLIED>
<!ELEMENT twDataPath (twSrc, twDest, twLogLvls, twSrcSite, twSrcClk?, twPathDel*, (twLogDel, twRouteDel, twTotDel)?, twDestClk?, (twPctLog, twPctRoute)?)>
<!ATTLIST twDataPath maxSiteLen CDATA #IMPLIED>
<!ELEMENT twClkPath (twSrc, twDest, twLogLvls, twSrcSite, twSrcClk?, twPathDel*, (twLogDel, twRouteDel, twTotDel)?, twDestClk?, (twPctLog, twPctRoute)?)>
<!ATTLIST twClkPath maxSiteLen CDATA #IMPLIED>
<!ELEMENT twLogLvls (#PCDATA)>
<!ELEMENT twSrcSite (#PCDATA)>
<!ELEMENT twSrcClk (#PCDATA)>
<!ATTLIST twSrcClk twEdge (twRising | twFalling) "twRising">
<!ATTLIST twSrcClk twArriveTime CDATA #IMPLIED>
<!ATTLIST twSrcClk twClkRes CDATA #IMPLIED>
<!ELEMENT twPathDel (twSite, twDelType, twFanCnt?, twDelInfo?, twComp, twNet?, twBEL*)>
<!ATTLIST twPathDel twHoldTime (TRUE | FALSE) "FALSE">
<!ELEMENT twDelInfo (#PCDATA)>
<!ATTLIST twDelInfo twEdge (twRising | twFalling | twIndet) #REQUIRED>
<!ATTLIST twDelInfo twAcc (twRouted | twEst | twApprox) "twRouted">
<!ELEMENT twSite (#PCDATA)>
<!ELEMENT twDelType (#PCDATA)>
<!ELEMENT twFanCnt (#PCDATA)>
<!ELEMENT twComp (#PCDATA)>
<!ELEMENT twNet (#PCDATA)>
<!ELEMENT twBEL (#PCDATA)>
<!ELEMENT twLogDel (#PCDATA)>
<!ELEMENT twRouteDel (#PCDATA)>
<!ELEMENT twDestClk (#PCDATA)>
<!ATTLIST twDestClk twEdge (twRising | twFalling) "twRising">
<!ATTLIST twDestClk twArriveTime CDATA #IMPLIED>
<!ATTLIST twDestClk twClkRes CDATA #IMPLIED>
<!ELEMENT twPctLog (#PCDATA)>
<!ELEMENT twPctRoute (#PCDATA)>
<!ELEMENT twNetRpt (twDelNet | twSlackNet | twSkewNet)>
<!ELEMENT twDelNet (twDel, twNet, twDetNet?)>
<!ELEMENT twSlackNet (twSlack, twNet, twDel, twNotMet?, twTimeConst, twAbsSlack, twDetNet?)>
<!ELEMENT twTimeConst (#PCDATA)>
<!ELEMENT twAbsSlack (#PCDATA)>
<!ELEMENT twSkewNet (twSlack, twNet, twSkew, twNotMet?, twTimeConst, twAbsSlack, twDetSkewNet?)>
<!ELEMENT twSkew (#PCDATA)>
<!ELEMENT twDetNet (twNetDel*)>
<!ELEMENT twNetDel (twSrc, twDest, twNetDelInfo)>
<!ELEMENT twNetDelInfo (#PCDATA)>
<!ATTLIST twNetDelInfo twAcc (twRouted | twEst | twApprox) "twRouted">
<!ELEMENT twDetSkewNet (twNetSkew*)>
<!ELEMENT twNetSkew (twSrc, twDest, twNetDelInfo, twSkew)>
<!ELEMENT twClkSkewLimit  EMPTY>
<!ATTLIST twClkSkewLimit slack CDATA #IMPLIED skew CDATA #IMPLIED arrv1name CDATA #IMPLIED                      arrv1 CDATA #IMPLIED
                         arrv2name CDATA #IMPLIED arrv2 CDATA #IMPLIED uncert CDATA #IMPLIED>
<!ELEMENT twConstRollupTable (twConstRollup*)>
<!ATTLIST twConstRollupTable uID CDATA #IMPLIED>
<!ELEMENT twConstRollup  EMPTY>
<!ATTLIST twConstRollup name CDATA #IMPLIED fullName CDATA #IMPLIED type CDATA #IMPLIED                      requirement CDATA #IMPLIED prefType CDATA #IMPLIED actual CDATA #IMPLIED>
<!ATTLIST twConstRollup  actualRollup CDATA #IMPLIED                      errors CDATA #IMPLIED errorRollup CDATA #IMPLIED items CDATA #IMPLIED                      itemsRollup CDATA #IMPLIED>
<!ELEMENT twConstList (twConstListItem)*>
<!ELEMENT twConstListItem (twConstName, twNotMet?, twReqVal?, twActVal?, twLogLvls?)> 
<!ATTLIST twConstListItem twUnits (twTime | twFreq) "twTime">
<!ELEMENT twNotMet EMPTY>
<!ELEMENT twReqVal (#PCDATA)>
<!ELEMENT twActVal (#PCDATA)>
<!ELEMENT twConstSummaryTable (twConstStats|twConstSummary)*>
<!ATTLIST twConstSummaryTable twEmptyConstraints CDATA #IMPLIED>
<!ELEMENT twConstStats (twConstName)>
<!ATTLIST twConstStats twUnits (twTime | twFreq) "twTime">
<!ATTLIST twConstStats twRequired CDATA #IMPLIED>
<!ATTLIST twConstStats twActual CDATA #IMPLIED>
<!ATTLIST twConstStats twSlack CDATA #IMPLIED>
<!ATTLIST twConstStats twLogLvls CDATA #IMPLIED>
<!ATTLIST twConstStats twErrors CDATA #IMPLIED>
<!ATTLIST twConstStats twPCFIndex CDATA #IMPLIED>
<!ATTLIST twConstStats twAbsSlackIndex CDATA #IMPLIED>
<!ATTLIST twConstStats twTCType CDATA #IMPLIED>
<!ELEMENT twConstSummary (twConstName, twConstData?, twConstData*)>
<!ATTLIST twConstSummary PCFIndex CDATA #IMPLIED  slackIndex CDATA #IMPLIED>
<!ELEMENT twConstData EMPTY>
<!ATTLIST twConstData type CDATA #IMPLIED  units (MHz | ns) "ns" slack CDATA #IMPLIED
                                          best CDATA #IMPLIED requested CDATA #IMPLIED
                                          errors CDATA #IMPLIED
                                          score CDATA #IMPLIED>
<!ELEMENT twTimeGrpRpt (twTimeGrp)*>
<!ELEMENT twTimeGrp (twTimeGrpName, twCompList?, twBELList?, twMacList?, twBlockList?, twSigList?, twPinList?)>
<!ELEMENT twTimeGrpName (#PCDATA)>
<!ELEMENT twCompList (twCompName+)>
<!ELEMENT twCompName (#PCDATA)>
<!ELEMENT twSigList (twSigName+)>
<!ELEMENT twSigName (#PCDATA)>
<!ELEMENT twBELList (twBELName+)>
<!ELEMENT twBELName (#PCDATA)>
<!ELEMENT twBlockList (twBlockName+)>
<!ELEMENT twBlockName (#PCDATA)>
<!ELEMENT twMacList (twMacName+)>
<!ELEMENT twMacName (#PCDATA)>
<!ELEMENT twPinList (twPinName+)>
<!ELEMENT twPinName (#PCDATA)>
<!ELEMENT twUnmetConstCnt (#PCDATA)>
<!ELEMENT twDataSheet (twSUH2ClkList*, (twClk2PadList|twClk2OutList)*, twClk2SUList*, twPad2PadList?, twOffsetTables?)>
<!ATTLIST twDataSheet twNameLen CDATA #REQUIRED>
<!ELEMENT twSUH2ClkList (twDest, twSUH2Clk+)>
<!ATTLIST twSUH2ClkList twDestWidth CDATA #IMPLIED>
<!ATTLIST twSUH2ClkList twPhaseWidth CDATA #IMPLIED>
<!ELEMENT twSUH2Clk (twSrc, twSUHTime, twSUHTime?)> 
<!ELEMENT twSUHTime (twSU2ClkTime?,twH2ClkTime?)>
<!ATTLIST twSUHTime twInternalClk CDATA #IMPLIED>
<!ATTLIST twSUHTime twClkPhase CDATA #IMPLIED>
<!ELEMENT twSU2ClkTime (#PCDATA)>
<!ATTLIST twSU2ClkTime twEdge (twRising | twFalling | twIndet) #REQUIRED>
<!ELEMENT twH2ClkTime (#PCDATA)>
<!ATTLIST twH2ClkTime twEdge (twRising | twFalling | twIndet) #REQUIRED>
<!ELEMENT twClk2PadList (twSrc, twClk2Pad+)>
<!ELEMENT twClk2Pad (twDest, twTime)>
<!ELEMENT twTime (#PCDATA)>
<!ATTLIST twTime twEdge (twRising | twFalling | twIndet) #REQUIRED>
<!ELEMENT twClk2OutList (twSrc, twClk2Out+)>
<!ATTLIST twClk2OutList twDestWidth CDATA #REQUIRED>
<!ATTLIST twClk2OutList twPhaseWidth CDATA #REQUIRED>
<!ELEMENT twClk2Out EMPTY>
<!ATTLIST twClk2Out twOutPad CDATA #REQUIRED>
<!ATTLIST twClk2Out twMinTime CDATA #REQUIRED>
<!ATTLIST twClk2Out twMinEdge CDATA #REQUIRED>
<!ATTLIST twClk2Out twMaxTime CDATA #REQUIRED>
<!ATTLIST twClk2Out twMaxEdge CDATA #REQUIRED>
<!ATTLIST twClk2Out twInternalClk CDATA #REQUIRED>
<!ATTLIST twClk2Out twClkPhase CDATA #REQUIRED>
<!ELEMENT twClk2SUList (twDest, twClk2SU+)>
<!ATTLIST twClk2SUList twDestWidth CDATA #IMPLIED>
<!ELEMENT twClk2SU (twSrc, twRiseRise?, twFallRise?, twRiseFall?, twFallFall?)>
<!ELEMENT twRiseRise (#PCDATA)>
<!ELEMENT twFallRise (#PCDATA)>
<!ELEMENT twRiseFall (#PCDATA)>
<!ELEMENT twFallFall (#PCDATA)>
<!ELEMENT twPad2PadList (twPad2Pad+)>
<!ATTLIST twPad2PadList twSrcWidth CDATA #IMPLIED>
<!ATTLIST twPad2PadList twDestWidth CDATA #IMPLIED>
<!ELEMENT twPad2Pad (twSrc, twDest, twDel)>
<!ELEMENT twOffsetTables (twOffsetInTable*,twOffsetOutTable*)>
<!ELEMENT twOffsetInTable (twConstName, twOffInTblRow*)>
<!ATTLIST twOffsetInTable twDestWidth CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstWindow CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstSetup CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstHold CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstSetupSlack CDATA #IMPLIED>
<!ATTLIST twOffsetInTable twWorstHoldSlack CDATA #IMPLIED>
<!ELEMENT twOffsetOutTable (twConstName, twOffOutTblRow*)>
<!ATTLIST twOffsetOutTable twDestWidth CDATA #IMPLIED>
<!ATTLIST twOffsetOutTable twMinSlack CDATA #IMPLIED>
<!ATTLIST twOffsetOutTable twMaxSlack CDATA #IMPLIED>
<!ATTLIST twOffsetOutTable twRelSkew CDATA #IMPLIED>
<!ELEMENT twOffInTblRow (twSrc, twSUHSlackTime*)>       
<!ELEMENT twSUHSlackTime (twSU2ClkTime?,twH2ClkTime?)>
<!ATTLIST twSUHSlackTime twSetupSlack CDATA #IMPLIED  twHoldSlack CDATA #IMPLIED>
<!ELEMENT twOffOutTblRow EMPTY>
<!ATTLIST twOffOutTblRow twOutPad CDATA #IMPLIED>
<!ATTLIST twOffOutTblRow twSlack CDATA #IMPLIED>
<!ATTLIST twOffOutTblRow twRelSkew CDATA #IMPLIED>
<!ELEMENT twNonDedClks ((twWarn | twInfo), twNonDedClk+)>
<!ELEMENT twNonDedClk (#PCDATA)>
<!ELEMENT twSum ( twErrCnt, twScore, twConstCov, twStats)>
<!ELEMENT twScore (#PCDATA)>
<!ELEMENT twConstCov (twPathCnt, twNetCnt, twConnCnt, twPct?)>
<!ELEMENT twPathCnt (#PCDATA)>
<!ELEMENT twNetCnt (#PCDATA)>
<!ELEMENT twConnCnt (#PCDATA)>
<!ELEMENT twPct (#PCDATA)>
<!ELEMENT twStats ( twMinPer?, twFootnote?, twMaxFreq?, twMaxCombDel?, twMaxFromToDel?, twMaxNetDel?, twMaxNetSkew?, twMaxInAfterClk?, twMinInBeforeClk?, twMaxOutBeforeClk?, twMinOutAfterClk?, (twInfo | twWarn)*)>
<!ELEMENT twMaxCombDel (#PCDATA)>
<!ELEMENT twMaxFromToDel (#PCDATA)>
<!ELEMENT twMaxNetDel (#PCDATA)>
<!ELEMENT twMaxNetSkew (#PCDATA)>
<!ELEMENT twMaxInAfterClk (#PCDATA)>
<!ELEMENT twMinInBeforeClk (#PCDATA)>
<!ELEMENT twMaxOutBeforeClk (#PCDATA)>
<!ELEMENT twMinOutAfterClk (#PCDATA)>
<!ELEMENT twFoot (twFootnoteExplanation*, twTimestamp)>
<!ELEMENT twTimestamp (#PCDATA)>
<!ELEMENT twFootnoteExplanation EMPTY>
<!ATTLIST twFootnoteExplanation number CDATA #REQUIRED>
<!ATTLIST twFootnoteExplanation text CDATA #REQUIRED>
<!ELEMENT twClientInfo (twClientName, twAttrList?)>
<!ELEMENT twClientName (#PCDATA)>
<!ELEMENT twAttrList (twAttrListItem)*>
<!ELEMENT twAttrListItem (twName, twValue*)>
<!ELEMENT twName (#PCDATA)>
<!ELEMENT twValue (#PCDATA)>
]>
<twReport><twHead anchorID="1"><twExecVer>Release 14.7 Trace  (nt64)</twExecVer><twCopyright>Copyright (c) 1995-2013 Xilinx, Inc.  All rights reserved.</twCopyright><twCmdLine>C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64\unwrapped\trce.exe -intstyle ise -v 3 -s 4
-n 3 -fastpaths -xml sport_top.twx sport_top.ncd -o sport_top.twr sport_top.pcf
-ucf sport_top.ucf

</twCmdLine><twDesign>sport_top.ncd</twDesign><twDesignPath>sport_top.ncd</twDesignPath><twPCF>sport_top.pcf</twPCF><twPcfPath>sport_top.pcf</twPcfPath><twDevInfo arch="spartan3a" pkg="fgg484"><twDevName>xc3s700an</twDevName><twSpeedGrade>-4</twSpeedGrade><twSpeedVer>PRODUCTION 1.42 2013-10-13</twSpeedVer></twDevInfo><twRptInfo twRptLvl="twVerbose" twReportMinPaths="true"  dlyHyperLnks="t" ><twEndptLimit>3</twEndptLimit></twRptInfo><twEnvVar name="NONE" description="No environment variables were set" /></twHead><twInfo anchorID="2">INFO:Timing:3412 - To improve timing, see the Timing Closure User Guide (UG612).</twInfo><twInfo anchorID="3">INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths option. All paths that are not constrained will be reported in the unconstrained paths section(s) of the report.</twInfo><twInfo anchorID="4">INFO:Timing:3339 - The clock-to-out numbers in this timing report are based on a 50 Ohm transmission line loading model.  For the details of this model, and for more information on accounting for different loading conditions, please see the device datasheet.</twInfo><twInfo anchorID="5">INFO:Timing:3390 - This architecture does not support a default System Jitter value, please add SYSTEM_JITTER constraint to the UCF to modify the Clock Uncertainty calculation.</twInfo><twInfo anchorID="6">INFO:Timing:3389 - This architecture does not support 'Discrete Jitter' and 'Phase Error' calculations, these terms will be zero in the Clock Uncertainty calculation.  Please make appropriate modification to SYSTEM_JITTER to account for the unsupported Discrete Jitter and Phase Error.</twInfo><twBody><twVerboseRpt><twConst anchorID="7" twConstType="PERIOD" ><twConstHead uID="1"><twConstName UCFConstName="TIMESPEC TS_rxclk = PERIOD &quot;rxclk&quot; 20 ns HIGH 50%;" ScopeName="">TS_rxclk = PERIOD TIMEGRP &quot;rxclk&quot; 20 ns HIGH 50%;</twConstName><twItemCnt>0</twItemCnt><twErrCntSetup>0</twErrCntSetup><twErrCntEndPt>0</twErrCntEndPt><twErrCntHold twRaceChecked="FALSE">0</twErrCntHold><twErrCntPinLimit>0</twErrCntPinLimit><twEndPtCnt>0</twEndPtCnt><twPathErrCnt>0</twPathErrCnt><twMinPer>1.602</twMinPer></twConstHead><twPinLimitRpt anchorID="8"><twPinLimitBanner>Component Switching Limit Checks: TS_rxclk = PERIOD TIMEGRP &quot;rxclk&quot; 20 ns HIGH 50%;</twPinLimitBanner><twPinLimit anchorID="9" type="MINLOWPULSE" name="Tcl" slack="18.398" period="20.000" constraintValue="10.000" deviceLimit="0.801" physResource="rxfs_rnm0/CLK" logResource="rxfs_rnm0/CK" locationPin="SLICE_X6Y54.CLK" clockNet="RSCLKx_OBUF"/><twPinLimit anchorID="10" type="MINHIGHPULSE" name="Tch" slack="18.398" period="20.000" constraintValue="10.000" deviceLimit="0.801" physResource="rxfs_rnm0/CLK" logResource="rxfs_rnm0/CK" locationPin="SLICE_X6Y54.CLK" clockNet="RSCLKx_OBUF"/><twPinLimit anchorID="11" type="MINPERIOD" name="Tcp" slack="18.398" period="20.000" constraintValue="20.000" deviceLimit="1.602" freqLimit="624.220" physResource="rxfs_rnm0/CLK" logResource="rxfs_rnm0/CK" locationPin="SLICE_X6Y54.CLK" clockNet="RSCLKx_OBUF"/></twPinLimitRpt></twConst><twConst anchorID="12" twConstType="PERIOD" ><twConstHead uID="2"><twConstName UCFConstName="TIMESPEC TS_txclk = PERIOD &quot;txclk&quot; 20 ns HIGH 50%;" ScopeName="">TS_txclk = PERIOD TIMEGRP &quot;txclk&quot; 20 ns HIGH 50%;</twConstName><twItemCnt>128</twItemCnt><twErrCntSetup>0</twErrCntSetup><twErrCntEndPt>0</twErrCntEndPt><twErrCntHold twRaceChecked="TRUE">0</twErrCntHold><twErrCntPinLimit>0</twErrCntPinLimit><twEndPtCnt>60</twEndPtCnt><twPathErrCnt>0</twPathErrCnt><twMinPer>4.635</twMinPer></twConstHead><twPathRptBanner iPaths="10" iCriticalPaths="0" sType="EndPoint">Paths for end point state_FSM_FFd2 (SLICE_X4Y53.F2), 10 paths
</twPathRptBanner><twPathRpt anchorID="13"><twConstPath anchorID="14" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>15.365</twSlack><twSrc BELType="FF">txpacketCnt_tx_7</twSrc><twDest BELType="FF">state_FSM_FFd2</twDest><twTotPathDel>4.672</twTotPathDel><twClkSkew dest = "0.056" src = "0.019">-0.037</twClkSkew><twDelConst>20.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="16"><twSrc BELType='FF'>txpacketCnt_tx_7</twSrc><twDest BELType='FF'>state_FSM_FFd2</twDest><twLogLvls>3</twLogLvls><twSrcSite>SLICE_X4Y60.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">TSCLKx_OBUF</twSrcClk><twPathDel><twSite>SLICE_X4Y60.XQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.631</twDelInfo><twComp>txpacketCnt_tx&lt;7&gt;</twComp><twBEL>txpacketCnt_tx_7</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y51.G3</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">1.234</twDelInfo><twComp>txpacketCnt_tx&lt;7&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X5Y51.COUT</twSite><twDelType>Topcyg</twDelType><twDelInfo twEdge="twRising">1.178</twDelInfo><twComp>Mcompar_state_cmp_eq0001_cy&lt;3&gt;</twComp><twBEL>Mcompar_state_cmp_eq0001_lut&lt;3&gt;</twBEL><twBEL>Mcompar_state_cmp_eq0001_cy&lt;3&gt;</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y52.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.000</twDelInfo><twComp>Mcompar_state_cmp_eq0001_cy&lt;3&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X5Y52.XB</twSite><twDelType>Tcinxb</twDelType><twDelInfo twEdge="twRising">0.296</twDelInfo><twComp>Mcompar_state_cmp_eq0001_cy&lt;4&gt;</twComp><twBEL>Mcompar_state_cmp_eq0001_cy&lt;4&gt;</twBEL></twPathDel><twPathDel><twSite>SLICE_X4Y53.F2</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.531</twDelInfo><twComp>Mcompar_state_cmp_eq0001_cy&lt;4&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X4Y53.CLK</twSite><twDelType>Tfck</twDelType><twDelInfo twEdge="twRising">0.802</twDelInfo><twComp>state_FSM_FFd2</twComp><twBEL>state_FSM_FFd2-In11</twBEL><twBEL>state_FSM_FFd2</twBEL></twPathDel><twLogDel>2.907</twLogDel><twRouteDel>1.765</twRouteDel><twTotDel>4.672</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="20.000">TSCLKx_OBUF</twDestClk><twPctLog>62.2</twPctLog><twPctRoute>37.8</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRpt anchorID="15"><twConstPath anchorID="16" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>15.387</twSlack><twSrc BELType="FF">txpacketCnt_tx_3</twSrc><twDest BELType="FF">state_FSM_FFd2</twDest><twTotPathDel>4.634</twTotPathDel><twClkSkew dest = "0.056" src = "0.035">-0.021</twClkSkew><twDelConst>20.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="16"><twSrc BELType='FF'>txpacketCnt_tx_3</twSrc><twDest BELType='FF'>state_FSM_FFd2</twDest><twLogLvls>4</twLogLvls><twSrcSite>SLICE_X4Y58.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">TSCLKx_OBUF</twSrcClk><twPathDel><twSite>SLICE_X4Y58.XQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.631</twDelInfo><twComp>txpacketCnt_tx&lt;3&gt;</twComp><twBEL>txpacketCnt_tx_3</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y50.G2</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">1.066</twDelInfo><twComp>txpacketCnt_tx&lt;3&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X5Y50.COUT</twSite><twDelType>Topcyg</twDelType><twDelInfo twEdge="twRising">1.178</twDelInfo><twComp>Mcompar_state_cmp_eq0001_cy&lt;1&gt;</twComp><twBEL>Mcompar_state_cmp_eq0001_lut&lt;1&gt;</twBEL><twBEL>Mcompar_state_cmp_eq0001_cy&lt;1&gt;</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y51.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.000</twDelInfo><twComp>Mcompar_state_cmp_eq0001_cy&lt;1&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X5Y51.COUT</twSite><twDelType>Tbyp</twDelType><twDelInfo twEdge="twRising">0.130</twDelInfo><twComp>Mcompar_state_cmp_eq0001_cy&lt;3&gt;</twComp><twBEL>Mcompar_state_cmp_eq0001_cy&lt;2&gt;</twBEL><twBEL>Mcompar_state_cmp_eq0001_cy&lt;3&gt;</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y52.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.000</twDelInfo><twComp>Mcompar_state_cmp_eq0001_cy&lt;3&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X5Y52.XB</twSite><twDelType>Tcinxb</twDelType><twDelInfo twEdge="twRising">0.296</twDelInfo><twComp>Mcompar_state_cmp_eq0001_cy&lt;4&gt;</twComp><twBEL>Mcompar_state_cmp_eq0001_cy&lt;4&gt;</twBEL></twPathDel><twPathDel><twSite>SLICE_X4Y53.F2</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.531</twDelInfo><twComp>Mcompar_state_cmp_eq0001_cy&lt;4&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X4Y53.CLK</twSite><twDelType>Tfck</twDelType><twDelInfo twEdge="twRising">0.802</twDelInfo><twComp>state_FSM_FFd2</twComp><twBEL>state_FSM_FFd2-In11</twBEL><twBEL>state_FSM_FFd2</twBEL></twPathDel><twLogDel>3.037</twLogDel><twRouteDel>1.597</twRouteDel><twTotDel>4.634</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="20.000">TSCLKx_OBUF</twDestClk><twPctLog>65.5</twPctLog><twPctRoute>34.5</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRpt anchorID="17"><twConstPath anchorID="18" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>15.400</twSlack><twSrc BELType="FF">txpacketCnt_tx_4</twSrc><twDest BELType="FF">state_FSM_FFd2</twDest><twTotPathDel>4.637</twTotPathDel><twClkSkew dest = "0.056" src = "0.019">-0.037</twClkSkew><twDelConst>20.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="16"><twSrc BELType='FF'>txpacketCnt_tx_4</twSrc><twDest BELType='FF'>state_FSM_FFd2</twDest><twLogLvls>3</twLogLvls><twSrcSite>SLICE_X4Y61.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">TSCLKx_OBUF</twSrcClk><twPathDel><twSite>SLICE_X4Y61.YQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.676</twDelInfo><twComp>txpacketCnt_tx&lt;5&gt;</twComp><twBEL>txpacketCnt_tx_4</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y51.F3</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">1.137</twDelInfo><twComp>txpacketCnt_tx&lt;4&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X5Y51.COUT</twSite><twDelType>Topcyf</twDelType><twDelInfo twEdge="twRising">1.195</twDelInfo><twComp>Mcompar_state_cmp_eq0001_cy&lt;3&gt;</twComp><twBEL>Mcompar_state_cmp_eq0001_lut&lt;2&gt;</twBEL><twBEL>Mcompar_state_cmp_eq0001_cy&lt;2&gt;</twBEL><twBEL>Mcompar_state_cmp_eq0001_cy&lt;3&gt;</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y52.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.000</twDelInfo><twComp>Mcompar_state_cmp_eq0001_cy&lt;3&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X5Y52.XB</twSite><twDelType>Tcinxb</twDelType><twDelInfo twEdge="twRising">0.296</twDelInfo><twComp>Mcompar_state_cmp_eq0001_cy&lt;4&gt;</twComp><twBEL>Mcompar_state_cmp_eq0001_cy&lt;4&gt;</twBEL></twPathDel><twPathDel><twSite>SLICE_X4Y53.F2</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.531</twDelInfo><twComp>Mcompar_state_cmp_eq0001_cy&lt;4&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X4Y53.CLK</twSite><twDelType>Tfck</twDelType><twDelInfo twEdge="twRising">0.802</twDelInfo><twComp>state_FSM_FFd2</twComp><twBEL>state_FSM_FFd2-In11</twBEL><twBEL>state_FSM_FFd2</twBEL></twPathDel><twLogDel>2.969</twLogDel><twRouteDel>1.668</twRouteDel><twTotDel>4.637</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="20.000">TSCLKx_OBUF</twDestClk><twPctLog>64.0</twPctLog><twPctRoute>36.0</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner iPaths="5" iCriticalPaths="0" sType="EndPoint">Paths for end point state_FSM_FFd2 (SLICE_X4Y53.F3), 5 paths
</twPathRptBanner><twPathRpt anchorID="19"><twConstPath anchorID="20" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>15.427</twSlack><twSrc BELType="FF">txsampleCnt_tx_4</twSrc><twDest BELType="FF">state_FSM_FFd2</twDest><twTotPathDel>4.569</twTotPathDel><twClkSkew dest = "0.056" src = "0.060">0.004</twClkSkew><twDelConst>20.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="15"><twSrc BELType='FF'>txsampleCnt_tx_4</twSrc><twDest BELType='FF'>state_FSM_FFd2</twDest><twLogLvls>4</twLogLvls><twSrcSite>SLICE_X4Y55.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">TSCLKx_OBUF</twSrcClk><twPathDel><twSite>SLICE_X4Y55.XQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.631</twDelInfo><twComp>txsampleCnt_tx&lt;4&gt;</twComp><twBEL>txsampleCnt_tx_4</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y53.G2</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">0.903</twDelInfo><twComp>txsampleCnt_tx&lt;4&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X5Y53.Y</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.648</twDelInfo><twComp>state_FSM_FFd1-In_bdd2</twComp><twBEL>state_FSM_FFd1-In51</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y53.F4</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.044</twDelInfo><twComp>state_FSM_FFd1-In51/O</twComp></twPathDel><twPathDel><twSite>SLICE_X5Y53.X</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.643</twDelInfo><twComp>state_FSM_FFd1-In_bdd2</twComp><twBEL>state_FSM_FFd1-In31</twBEL></twPathDel><twPathDel><twSite>SLICE_X4Y53.G4</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">0.148</twDelInfo><twComp>state_FSM_FFd1-In_bdd2</twComp></twPathDel><twPathDel><twSite>SLICE_X4Y53.Y</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.707</twDelInfo><twComp>state_FSM_FFd2</twComp><twBEL>state_FSM_FFd1-In21_SW0</twBEL></twPathDel><twPathDel><twSite>SLICE_X4Y53.F3</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.043</twDelInfo><twComp>state_FSM_FFd1-In21_SW0/O</twComp></twPathDel><twPathDel><twSite>SLICE_X4Y53.CLK</twSite><twDelType>Tfck</twDelType><twDelInfo twEdge="twRising">0.802</twDelInfo><twComp>state_FSM_FFd2</twComp><twBEL>state_FSM_FFd2-In11</twBEL><twBEL>state_FSM_FFd2</twBEL></twPathDel><twLogDel>3.431</twLogDel><twRouteDel>1.138</twRouteDel><twTotDel>4.569</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="20.000">TSCLKx_OBUF</twDestClk><twPctLog>75.1</twPctLog><twPctRoute>24.9</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRpt anchorID="21"><twConstPath anchorID="22" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>15.471</twSlack><twSrc BELType="FF">txsampleCnt_tx_1</twSrc><twDest BELType="FF">state_FSM_FFd2</twDest><twTotPathDel>4.525</twTotPathDel><twClkSkew dest = "0.056" src = "0.060">0.004</twClkSkew><twDelConst>20.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="15"><twSrc BELType='FF'>txsampleCnt_tx_1</twSrc><twDest BELType='FF'>state_FSM_FFd2</twDest><twLogLvls>4</twLogLvls><twSrcSite>SLICE_X5Y54.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">TSCLKx_OBUF</twSrcClk><twPathDel><twSite>SLICE_X5Y54.XQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.591</twDelInfo><twComp>txsampleCnt_tx&lt;1&gt;</twComp><twBEL>txsampleCnt_tx_1</twBEL></twPathDel><twPathDel><twSite>SLICE_X4Y54.F1</twSite><twDelType>net</twDelType><twFanCnt>4</twFanCnt><twDelInfo twEdge="twRising">0.579</twDelInfo><twComp>txsampleCnt_tx&lt;1&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X4Y54.X</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.692</twDelInfo><twComp>txsampleCnt_tx&lt;2&gt;</twComp><twBEL>state_FSM_FFd1-In41_SW0</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y53.F3</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.320</twDelInfo><twComp>N21</twComp></twPathDel><twPathDel><twSite>SLICE_X5Y53.X</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.643</twDelInfo><twComp>state_FSM_FFd1-In_bdd2</twComp><twBEL>state_FSM_FFd1-In31</twBEL></twPathDel><twPathDel><twSite>SLICE_X4Y53.G4</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">0.148</twDelInfo><twComp>state_FSM_FFd1-In_bdd2</twComp></twPathDel><twPathDel><twSite>SLICE_X4Y53.Y</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.707</twDelInfo><twComp>state_FSM_FFd2</twComp><twBEL>state_FSM_FFd1-In21_SW0</twBEL></twPathDel><twPathDel><twSite>SLICE_X4Y53.F3</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.043</twDelInfo><twComp>state_FSM_FFd1-In21_SW0/O</twComp></twPathDel><twPathDel><twSite>SLICE_X4Y53.CLK</twSite><twDelType>Tfck</twDelType><twDelInfo twEdge="twRising">0.802</twDelInfo><twComp>state_FSM_FFd2</twComp><twBEL>state_FSM_FFd2-In11</twBEL><twBEL>state_FSM_FFd2</twBEL></twPathDel><twLogDel>3.435</twLogDel><twRouteDel>1.090</twRouteDel><twTotDel>4.525</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="20.000">TSCLKx_OBUF</twDestClk><twPctLog>75.9</twPctLog><twPctRoute>24.1</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRpt anchorID="23"><twConstPath anchorID="24" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>15.651</twSlack><twSrc BELType="FF">txsampleCnt_tx_3</twSrc><twDest BELType="FF">state_FSM_FFd2</twDest><twTotPathDel>4.345</twTotPathDel><twClkSkew dest = "0.056" src = "0.060">0.004</twClkSkew><twDelConst>20.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="15"><twSrc BELType='FF'>txsampleCnt_tx_3</twSrc><twDest BELType='FF'>state_FSM_FFd2</twDest><twLogLvls>4</twLogLvls><twSrcSite>SLICE_X5Y55.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">TSCLKx_OBUF</twSrcClk><twPathDel><twSite>SLICE_X5Y55.XQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.591</twDelInfo><twComp>txsampleCnt_tx&lt;3&gt;</twComp><twBEL>txsampleCnt_tx_3</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y53.G4</twSite><twDelType>net</twDelType><twFanCnt>3</twFanCnt><twDelInfo twEdge="twRising">0.719</twDelInfo><twComp>txsampleCnt_tx&lt;3&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X5Y53.Y</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.648</twDelInfo><twComp>state_FSM_FFd1-In_bdd2</twComp><twBEL>state_FSM_FFd1-In51</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y53.F4</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.044</twDelInfo><twComp>state_FSM_FFd1-In51/O</twComp></twPathDel><twPathDel><twSite>SLICE_X5Y53.X</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.643</twDelInfo><twComp>state_FSM_FFd1-In_bdd2</twComp><twBEL>state_FSM_FFd1-In31</twBEL></twPathDel><twPathDel><twSite>SLICE_X4Y53.G4</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">0.148</twDelInfo><twComp>state_FSM_FFd1-In_bdd2</twComp></twPathDel><twPathDel><twSite>SLICE_X4Y53.Y</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.707</twDelInfo><twComp>state_FSM_FFd2</twComp><twBEL>state_FSM_FFd1-In21_SW0</twBEL></twPathDel><twPathDel><twSite>SLICE_X4Y53.F3</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.043</twDelInfo><twComp>state_FSM_FFd1-In21_SW0/O</twComp></twPathDel><twPathDel><twSite>SLICE_X4Y53.CLK</twSite><twDelType>Tfck</twDelType><twDelInfo twEdge="twRising">0.802</twDelInfo><twComp>state_FSM_FFd2</twComp><twBEL>state_FSM_FFd2-In11</twBEL><twBEL>state_FSM_FFd2</twBEL></twPathDel><twLogDel>3.391</twLogDel><twRouteDel>0.954</twRouteDel><twTotDel>4.345</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="20.000">TSCLKx_OBUF</twDestClk><twPctLog>78.0</twPctLog><twPctRoute>22.0</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner iPaths="10" iCriticalPaths="0" sType="EndPoint">Paths for end point txpacketCnt_tx_9 (SLICE_X4Y62.F2), 10 paths
</twPathRptBanner><twPathRpt anchorID="25"><twConstPath anchorID="26" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>15.504</twSlack><twSrc BELType="FF">txpacketCnt_tx_1</twSrc><twDest BELType="FF">txpacketCnt_tx_9</twDest><twTotPathDel>4.467</twTotPathDel><twClkSkew dest = "0.006" src = "0.035">0.029</twClkSkew><twDelConst>20.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="16"><twSrc BELType='FF'>txpacketCnt_tx_1</twSrc><twDest BELType='FF'>txpacketCnt_tx_9</twDest><twLogLvls>6</twLogLvls><twSrcSite>SLICE_X4Y59.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">TSCLKx_OBUF</twSrcClk><twPathDel><twSite>SLICE_X4Y59.XQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.631</twDelInfo><twComp>txpacketCnt_tx&lt;1&gt;</twComp><twBEL>txpacketCnt_tx_1</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y58.G1</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">0.528</twDelInfo><twComp>txpacketCnt_tx&lt;1&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X5Y58.COUT</twSite><twDelType>Topcyg</twDelType><twDelInfo twEdge="twRising">1.178</twDelInfo><twComp>txpacketCnt_tx_addsub0000&lt;0&gt;</twComp><twBEL>txpacketCnt_tx&lt;1&gt;_rt</twBEL><twBEL>Madd_txpacketCnt_tx_addsub0000_cy&lt;1&gt;</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y59.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.000</twDelInfo><twComp>Madd_txpacketCnt_tx_addsub0000_cy&lt;1&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X5Y59.COUT</twSite><twDelType>Tbyp</twDelType><twDelInfo twEdge="twRising">0.130</twDelInfo><twComp>txpacketCnt_tx_addsub0000&lt;2&gt;</twComp><twBEL>Madd_txpacketCnt_tx_addsub0000_cy&lt;2&gt;</twBEL><twBEL>Madd_txpacketCnt_tx_addsub0000_cy&lt;3&gt;</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y60.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.000</twDelInfo><twComp>Madd_txpacketCnt_tx_addsub0000_cy&lt;3&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X5Y60.COUT</twSite><twDelType>Tbyp</twDelType><twDelInfo twEdge="twRising">0.130</twDelInfo><twComp>txpacketCnt_tx_addsub0000&lt;4&gt;</twComp><twBEL>Madd_txpacketCnt_tx_addsub0000_cy&lt;4&gt;</twBEL><twBEL>Madd_txpacketCnt_tx_addsub0000_cy&lt;5&gt;</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y61.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.000</twDelInfo><twComp>Madd_txpacketCnt_tx_addsub0000_cy&lt;5&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X5Y61.COUT</twSite><twDelType>Tbyp</twDelType><twDelInfo twEdge="twRising">0.130</twDelInfo><twComp>txpacketCnt_tx_addsub0000&lt;6&gt;</twComp><twBEL>Madd_txpacketCnt_tx_addsub0000_cy&lt;6&gt;</twBEL><twBEL>Madd_txpacketCnt_tx_addsub0000_cy&lt;7&gt;</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y62.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.000</twDelInfo><twComp>Madd_txpacketCnt_tx_addsub0000_cy&lt;7&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X5Y62.Y</twSite><twDelType>Tciny</twDelType><twDelInfo twEdge="twRising">0.864</twDelInfo><twComp>txpacketCnt_tx_addsub0000&lt;8&gt;</twComp><twBEL>Madd_txpacketCnt_tx_addsub0000_cy&lt;8&gt;</twBEL><twBEL>Madd_txpacketCnt_tx_addsub0000_xor&lt;9&gt;</twBEL></twPathDel><twPathDel><twSite>SLICE_X4Y62.F2</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.074</twDelInfo><twComp>txpacketCnt_tx_addsub0000&lt;9&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X4Y62.CLK</twSite><twDelType>Tfck</twDelType><twDelInfo twEdge="twRising">0.802</twDelInfo><twComp>txpacketCnt_tx&lt;9&gt;</twComp><twBEL>txpacketCnt_tx_mux0000&lt;9&gt;1</twBEL><twBEL>txpacketCnt_tx_9</twBEL></twPathDel><twLogDel>3.865</twLogDel><twRouteDel>0.602</twRouteDel><twTotDel>4.467</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="20.000">TSCLKx_OBUF</twDestClk><twPctLog>86.5</twPctLog><twPctRoute>13.5</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRpt anchorID="27"><twConstPath anchorID="28" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>15.560</twSlack><twSrc BELType="FF">txpacketCnt_tx_0</twSrc><twDest BELType="FF">txpacketCnt_tx_9</twDest><twTotPathDel>4.411</twTotPathDel><twClkSkew dest = "0.006" src = "0.035">0.029</twClkSkew><twDelConst>20.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="16"><twSrc BELType='FF'>txpacketCnt_tx_0</twSrc><twDest BELType='FF'>txpacketCnt_tx_9</twDest><twLogLvls>6</twLogLvls><twSrcSite>SLICE_X4Y59.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">TSCLKx_OBUF</twSrcClk><twPathDel><twSite>SLICE_X4Y59.YQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.676</twDelInfo><twComp>txpacketCnt_tx&lt;1&gt;</twComp><twBEL>txpacketCnt_tx_0</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y58.F4</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">0.410</twDelInfo><twComp>txpacketCnt_tx&lt;0&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X5Y58.COUT</twSite><twDelType>Topcyf</twDelType><twDelInfo twEdge="twRising">1.195</twDelInfo><twComp>txpacketCnt_tx_addsub0000&lt;0&gt;</twComp><twBEL>Madd_txpacketCnt_tx_addsub0000_lut&lt;0&gt;_INV_0</twBEL><twBEL>Madd_txpacketCnt_tx_addsub0000_cy&lt;0&gt;</twBEL><twBEL>Madd_txpacketCnt_tx_addsub0000_cy&lt;1&gt;</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y59.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.000</twDelInfo><twComp>Madd_txpacketCnt_tx_addsub0000_cy&lt;1&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X5Y59.COUT</twSite><twDelType>Tbyp</twDelType><twDelInfo twEdge="twRising">0.130</twDelInfo><twComp>txpacketCnt_tx_addsub0000&lt;2&gt;</twComp><twBEL>Madd_txpacketCnt_tx_addsub0000_cy&lt;2&gt;</twBEL><twBEL>Madd_txpacketCnt_tx_addsub0000_cy&lt;3&gt;</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y60.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.000</twDelInfo><twComp>Madd_txpacketCnt_tx_addsub0000_cy&lt;3&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X5Y60.COUT</twSite><twDelType>Tbyp</twDelType><twDelInfo twEdge="twRising">0.130</twDelInfo><twComp>txpacketCnt_tx_addsub0000&lt;4&gt;</twComp><twBEL>Madd_txpacketCnt_tx_addsub0000_cy&lt;4&gt;</twBEL><twBEL>Madd_txpacketCnt_tx_addsub0000_cy&lt;5&gt;</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y61.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.000</twDelInfo><twComp>Madd_txpacketCnt_tx_addsub0000_cy&lt;5&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X5Y61.COUT</twSite><twDelType>Tbyp</twDelType><twDelInfo twEdge="twRising">0.130</twDelInfo><twComp>txpacketCnt_tx_addsub0000&lt;6&gt;</twComp><twBEL>Madd_txpacketCnt_tx_addsub0000_cy&lt;6&gt;</twBEL><twBEL>Madd_txpacketCnt_tx_addsub0000_cy&lt;7&gt;</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y62.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.000</twDelInfo><twComp>Madd_txpacketCnt_tx_addsub0000_cy&lt;7&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X5Y62.Y</twSite><twDelType>Tciny</twDelType><twDelInfo twEdge="twRising">0.864</twDelInfo><twComp>txpacketCnt_tx_addsub0000&lt;8&gt;</twComp><twBEL>Madd_txpacketCnt_tx_addsub0000_cy&lt;8&gt;</twBEL><twBEL>Madd_txpacketCnt_tx_addsub0000_xor&lt;9&gt;</twBEL></twPathDel><twPathDel><twSite>SLICE_X4Y62.F2</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.074</twDelInfo><twComp>txpacketCnt_tx_addsub0000&lt;9&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X4Y62.CLK</twSite><twDelType>Tfck</twDelType><twDelInfo twEdge="twRising">0.802</twDelInfo><twComp>txpacketCnt_tx&lt;9&gt;</twComp><twBEL>txpacketCnt_tx_mux0000&lt;9&gt;1</twBEL><twBEL>txpacketCnt_tx_9</twBEL></twPathDel><twLogDel>3.927</twLogDel><twRouteDel>0.484</twRouteDel><twTotDel>4.411</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="20.000">TSCLKx_OBUF</twDestClk><twPctLog>89.0</twPctLog><twPctRoute>11.0</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRpt anchorID="29"><twConstPath anchorID="30" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>15.564</twSlack><twSrc BELType="FF">txpacketCnt_tx_2</twSrc><twDest BELType="FF">txpacketCnt_tx_9</twDest><twTotPathDel>4.407</twTotPathDel><twClkSkew dest = "0.006" src = "0.035">0.029</twClkSkew><twDelConst>20.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="16"><twSrc BELType='FF'>txpacketCnt_tx_2</twSrc><twDest BELType='FF'>txpacketCnt_tx_9</twDest><twLogLvls>5</twLogLvls><twSrcSite>SLICE_X4Y58.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">TSCLKx_OBUF</twSrcClk><twPathDel><twSite>SLICE_X4Y58.YQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.676</twDelInfo><twComp>txpacketCnt_tx&lt;3&gt;</twComp><twBEL>txpacketCnt_tx_2</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y59.F3</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">0.536</twDelInfo><twComp>txpacketCnt_tx&lt;2&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X5Y59.COUT</twSite><twDelType>Topcyf</twDelType><twDelInfo twEdge="twRising">1.195</twDelInfo><twComp>txpacketCnt_tx_addsub0000&lt;2&gt;</twComp><twBEL>txpacketCnt_tx&lt;2&gt;_rt</twBEL><twBEL>Madd_txpacketCnt_tx_addsub0000_cy&lt;2&gt;</twBEL><twBEL>Madd_txpacketCnt_tx_addsub0000_cy&lt;3&gt;</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y60.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.000</twDelInfo><twComp>Madd_txpacketCnt_tx_addsub0000_cy&lt;3&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X5Y60.COUT</twSite><twDelType>Tbyp</twDelType><twDelInfo twEdge="twRising">0.130</twDelInfo><twComp>txpacketCnt_tx_addsub0000&lt;4&gt;</twComp><twBEL>Madd_txpacketCnt_tx_addsub0000_cy&lt;4&gt;</twBEL><twBEL>Madd_txpacketCnt_tx_addsub0000_cy&lt;5&gt;</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y61.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.000</twDelInfo><twComp>Madd_txpacketCnt_tx_addsub0000_cy&lt;5&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X5Y61.COUT</twSite><twDelType>Tbyp</twDelType><twDelInfo twEdge="twRising">0.130</twDelInfo><twComp>txpacketCnt_tx_addsub0000&lt;6&gt;</twComp><twBEL>Madd_txpacketCnt_tx_addsub0000_cy&lt;6&gt;</twBEL><twBEL>Madd_txpacketCnt_tx_addsub0000_cy&lt;7&gt;</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y62.CIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.000</twDelInfo><twComp>Madd_txpacketCnt_tx_addsub0000_cy&lt;7&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X5Y62.Y</twSite><twDelType>Tciny</twDelType><twDelInfo twEdge="twRising">0.864</twDelInfo><twComp>txpacketCnt_tx_addsub0000&lt;8&gt;</twComp><twBEL>Madd_txpacketCnt_tx_addsub0000_cy&lt;8&gt;</twBEL><twBEL>Madd_txpacketCnt_tx_addsub0000_xor&lt;9&gt;</twBEL></twPathDel><twPathDel><twSite>SLICE_X4Y62.F2</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.074</twDelInfo><twComp>txpacketCnt_tx_addsub0000&lt;9&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X4Y62.CLK</twSite><twDelType>Tfck</twDelType><twDelInfo twEdge="twRising">0.802</twDelInfo><twComp>txpacketCnt_tx&lt;9&gt;</twComp><twBEL>txpacketCnt_tx_mux0000&lt;9&gt;1</twBEL><twBEL>txpacketCnt_tx_9</twBEL></twPathDel><twLogDel>3.797</twLogDel><twRouteDel>0.610</twRouteDel><twTotDel>4.407</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="20.000">TSCLKx_OBUF</twDestClk><twPctLog>86.2</twPctLog><twPctRoute>13.8</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner sType="PathClass">Hold Paths: TS_txclk = PERIOD TIMEGRP &quot;txclk&quot; 20 ns HIGH 50%;
</twPathRptBanner><twPathRptBanner iPaths="1" iCriticalPaths="0" sType="EndPoint">Paths for end point txsampleCnt_tx_1 (SLICE_X5Y54.F4), 1 path
</twPathRptBanner><twPathRpt anchorID="31"><twConstPath anchorID="32" twDataPathType="twDataPathMinDelay" constType="period"><twSlack>1.314</twSlack><twSrc BELType="FF">txsampleCnt_tx_1</twSrc><twDest BELType="FF">txsampleCnt_tx_1</twDest><twTotPathDel>1.314</twTotPathDel><twClkSkew>0.000</twClkSkew><twDelConst>0.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="15"><twSrc BELType='FF'>txsampleCnt_tx_1</twSrc><twDest BELType='FF'>txsampleCnt_tx_1</twDest><twLogLvls>1</twLogLvls><twSrcSite>SLICE_X5Y54.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="20.000">TSCLKx_OBUF</twSrcClk><twPathDel><twSite>SLICE_X5Y54.XQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twFalling">0.473</twDelInfo><twComp>txsampleCnt_tx&lt;1&gt;</twComp><twBEL>txsampleCnt_tx_1</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y54.F4</twSite><twDelType>net</twDelType><twFanCnt>4</twFanCnt><twDelInfo twEdge="twFalling">0.375</twDelInfo><twComp>txsampleCnt_tx&lt;1&gt;</twComp></twPathDel><twPathDel twHoldTime="TRUE"><twSite>SLICE_X5Y54.CLK</twSite><twDelType>Tckf</twDelType><twDelInfo twEdge="twFalling">0.466</twDelInfo><twComp>txsampleCnt_tx&lt;1&gt;</twComp><twBEL>txsampleCnt_tx_mux0000&lt;1&gt;1</twBEL><twBEL>txsampleCnt_tx_1</twBEL></twPathDel><twLogDel>0.939</twLogDel><twRouteDel>0.375</twRouteDel><twTotDel>1.314</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="20.000">TSCLKx_OBUF</twDestClk><twPctLog>71.5</twPctLog><twPctRoute>28.5</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner iPaths="1" iCriticalPaths="0" sType="EndPoint">Paths for end point txsampleCnt_tx_0 (SLICE_X5Y54.G4), 1 path
</twPathRptBanner><twPathRpt anchorID="33"><twConstPath anchorID="34" twDataPathType="twDataPathMinDelay" constType="period"><twSlack>1.363</twSlack><twSrc BELType="FF">state_FSM_FFd2</twSrc><twDest BELType="FF">txsampleCnt_tx_0</twDest><twTotPathDel>1.367</twTotPathDel><twClkSkew dest = "0.060" src = "0.056">-0.004</twClkSkew><twDelConst>0.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="15"><twSrc BELType='FF'>state_FSM_FFd2</twSrc><twDest BELType='FF'>txsampleCnt_tx_0</twDest><twLogLvls>1</twLogLvls><twSrcSite>SLICE_X4Y53.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="20.000">TSCLKx_OBUF</twSrcClk><twPathDel><twSite>SLICE_X4Y53.XQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twFalling">0.505</twDelInfo><twComp>state_FSM_FFd2</twComp><twBEL>state_FSM_FFd2</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y54.G4</twSite><twDelType>net</twDelType><twFanCnt>18</twFanCnt><twDelInfo twEdge="twFalling">0.392</twDelInfo><twComp>state_FSM_FFd2</twComp></twPathDel><twPathDel twHoldTime="TRUE"><twSite>SLICE_X5Y54.CLK</twSite><twDelType>Tckg</twDelType><twDelInfo twEdge="twFalling">0.470</twDelInfo><twComp>txsampleCnt_tx&lt;1&gt;</twComp><twBEL>txsampleCnt_tx_mux0000&lt;0&gt;1</twBEL><twBEL>txsampleCnt_tx_0</twBEL></twPathDel><twLogDel>0.975</twLogDel><twRouteDel>0.392</twRouteDel><twTotDel>1.367</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="20.000">TSCLKx_OBUF</twDestClk><twPctLog>71.3</twPctLog><twPctRoute>28.7</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner iPaths="1" iCriticalPaths="0" sType="EndPoint">Paths for end point txsampleCnt_tx_3 (SLICE_X5Y55.F3), 1 path
</twPathRptBanner><twPathRpt anchorID="35"><twConstPath anchorID="36" twDataPathType="twDataPathMinDelay" constType="period"><twSlack>1.418</twSlack><twSrc BELType="FF">state_FSM_FFd2</twSrc><twDest BELType="FF">txsampleCnt_tx_3</twDest><twTotPathDel>1.422</twTotPathDel><twClkSkew dest = "0.060" src = "0.056">-0.004</twClkSkew><twDelConst>0.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="15"><twSrc BELType='FF'>state_FSM_FFd2</twSrc><twDest BELType='FF'>txsampleCnt_tx_3</twDest><twLogLvls>1</twLogLvls><twSrcSite>SLICE_X4Y53.CLK</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="20.000">TSCLKx_OBUF</twSrcClk><twPathDel><twSite>SLICE_X4Y53.XQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twFalling">0.505</twDelInfo><twComp>state_FSM_FFd2</twComp><twBEL>state_FSM_FFd2</twBEL></twPathDel><twPathDel><twSite>SLICE_X5Y55.F3</twSite><twDelType>net</twDelType><twFanCnt>18</twFanCnt><twDelInfo twEdge="twFalling">0.451</twDelInfo><twComp>state_FSM_FFd2</twComp></twPathDel><twPathDel twHoldTime="TRUE"><twSite>SLICE_X5Y55.CLK</twSite><twDelType>Tckf</twDelType><twDelInfo twEdge="twFalling">0.466</twDelInfo><twComp>txsampleCnt_tx&lt;3&gt;</twComp><twBEL>txsampleCnt_tx_mux0000&lt;3&gt;1</twBEL><twBEL>txsampleCnt_tx_3</twBEL></twPathDel><twLogDel>0.971</twLogDel><twRouteDel>0.451</twRouteDel><twTotDel>1.422</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="20.000">TSCLKx_OBUF</twDestClk><twPctLog>68.3</twPctLog><twPctRoute>31.7</twPctRoute></twDetPath></twConstPath></twPathRpt><twPinLimitRpt anchorID="37"><twPinLimitBanner>Component Switching Limit Checks: TS_txclk = PERIOD TIMEGRP &quot;txclk&quot; 20 ns HIGH 50%;</twPinLimitBanner><twPinLimit anchorID="38" type="MINLOWPULSE" name="Tcl" slack="18.398" period="20.000" constraintValue="10.000" deviceLimit="0.801" physResource="state_FSM_FFd1/CLK" logResource="state_FSM_FFd1/CK" locationPin="SLICE_X4Y52.CLK" clockNet="TSCLKx_OBUF"/><twPinLimit anchorID="39" type="MINHIGHPULSE" name="Tch" slack="18.398" period="20.000" constraintValue="10.000" deviceLimit="0.801" physResource="state_FSM_FFd1/CLK" logResource="state_FSM_FFd1/CK" locationPin="SLICE_X4Y52.CLK" clockNet="TSCLKx_OBUF"/><twPinLimit anchorID="40" type="MINPERIOD" name="Tcp" slack="18.398" period="20.000" constraintValue="20.000" deviceLimit="1.602" freqLimit="624.220" physResource="state_FSM_FFd1/CLK" logResource="state_FSM_FFd1/CK" locationPin="SLICE_X4Y52.CLK" clockNet="TSCLKx_OBUF"/></twPinLimitRpt></twConst><twConst anchorID="41" twConstType="PERIOD" ><twConstHead uID="3"><twConstName UCFConstName="TIMESPEC TS_wb_clk_i = PERIOD &quot;wb_clk_i&quot; 10 ns HIGH 50%;" ScopeName="">TS_wb_clk_i = PERIOD TIMEGRP &quot;wb_clk_i&quot; 10 ns HIGH 50%;</twConstName><twItemCnt>22</twItemCnt><twErrCntSetup>0</twErrCntSetup><twErrCntEndPt>0</twErrCntEndPt><twErrCntHold twRaceChecked="TRUE">0</twErrCntHold><twErrCntPinLimit>0</twErrCntPinLimit><twEndPtCnt>22</twEndPtCnt><twPathErrCnt>0</twPathErrCnt><twMinPer>3.204</twMinPer></twConstHead><twPathRptBanner iPaths="1" iCriticalPaths="0" sType="EndPoint">Paths for end point wb_interface/rxreg_20 (SLICE_X1Y54.CE), 1 path
</twPathRptBanner><twPathRpt anchorID="42"><twConstPath anchorID="43" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>6.860</twSlack><twSrc BELType="FF">wb_interface/rxreg_20</twSrc><twDest BELType="FF">wb_interface/rxreg_20</twDest><twTotPathDel>3.140</twTotPathDel><twClkSkew>0.000</twClkSkew><twDelConst>10.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="15"><twSrc BELType='FF'>wb_interface/rxreg_20</twSrc><twDest BELType='FF'>wb_interface/rxreg_20</twDest><twLogLvls>1</twLogLvls><twSrcSite>SLICE_X1Y54.CLK</twSrcSite><twSrcClk twEdge ="twFalling" twArriveTime ="5.000">wb_clk_i_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X1Y54.XQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.591</twDelInfo><twComp>wb_interface/rxreg&lt;20&gt;</twComp><twBEL>wb_interface/rxreg_20</twBEL></twPathDel><twPathDel><twSite>SLICE_X0Y54.G4</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.404</twDelInfo><twComp>wb_interface/rxreg&lt;20&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X0Y54.Y</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.707</twDelInfo><twComp>wb_interface/wb_dat_rdbk</twComp><twBEL>wb_interface/rxreg_and00001</twBEL></twPathDel><twPathDel><twSite>SLICE_X1Y54.CE</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">1.127</twDelInfo><twComp>wb_interface/rxreg_and0000</twComp></twPathDel><twPathDel><twSite>SLICE_X1Y54.CLK</twSite><twDelType>Tceck</twDelType><twDelInfo twEdge="twRising">0.311</twDelInfo><twComp>wb_interface/rxreg&lt;20&gt;</twComp><twBEL>wb_interface/rxreg_20</twBEL></twPathDel><twLogDel>1.609</twLogDel><twRouteDel>1.531</twRouteDel><twTotDel>3.140</twTotDel><twDestClk twEdge ="twFalling" twArriveTime ="15.000">wb_clk_i_BUFGP</twDestClk><twPctLog>51.2</twPctLog><twPctRoute>48.8</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner iPaths="1" iCriticalPaths="0" sType="EndPoint">Paths for end point wb_interface/rxreg_17 (SLICE_X1Y54.CE), 1 path
</twPathRptBanner><twPathRpt anchorID="44"><twConstPath anchorID="45" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>6.860</twSlack><twSrc BELType="FF">wb_interface/rxreg_20</twSrc><twDest BELType="FF">wb_interface/rxreg_17</twDest><twTotPathDel>3.140</twTotPathDel><twClkSkew>0.000</twClkSkew><twDelConst>10.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="15"><twSrc BELType='FF'>wb_interface/rxreg_20</twSrc><twDest BELType='FF'>wb_interface/rxreg_17</twDest><twLogLvls>1</twLogLvls><twSrcSite>SLICE_X1Y54.CLK</twSrcSite><twSrcClk twEdge ="twFalling" twArriveTime ="5.000">wb_clk_i_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X1Y54.XQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.591</twDelInfo><twComp>wb_interface/rxreg&lt;20&gt;</twComp><twBEL>wb_interface/rxreg_20</twBEL></twPathDel><twPathDel><twSite>SLICE_X0Y54.G4</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.404</twDelInfo><twComp>wb_interface/rxreg&lt;20&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X0Y54.Y</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.707</twDelInfo><twComp>wb_interface/wb_dat_rdbk</twComp><twBEL>wb_interface/rxreg_and00001</twBEL></twPathDel><twPathDel><twSite>SLICE_X1Y54.CE</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">1.127</twDelInfo><twComp>wb_interface/rxreg_and0000</twComp></twPathDel><twPathDel><twSite>SLICE_X1Y54.CLK</twSite><twDelType>Tceck</twDelType><twDelInfo twEdge="twRising">0.311</twDelInfo><twComp>wb_interface/rxreg&lt;20&gt;</twComp><twBEL>wb_interface/rxreg_17</twBEL></twPathDel><twLogDel>1.609</twLogDel><twRouteDel>1.531</twRouteDel><twTotDel>3.140</twTotDel><twDestClk twEdge ="twFalling" twArriveTime ="15.000">wb_clk_i_BUFGP</twDestClk><twPctLog>51.2</twPctLog><twPctRoute>48.8</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner iPaths="1" iCriticalPaths="0" sType="EndPoint">Paths for end point wb_interface/rxreg_15 (SLICE_X1Y50.CE), 1 path
</twPathRptBanner><twPathRpt anchorID="46"><twConstPath anchorID="47" twDataPathType="twDataPathMaxDelay" constType="period"><twSlack>6.861</twSlack><twSrc BELType="FF">wb_interface/rxreg_20</twSrc><twDest BELType="FF">wb_interface/rxreg_15</twDest><twTotPathDel>3.140</twTotPathDel><twClkSkew dest = "0.020" src = "0.019">-0.001</twClkSkew><twDelConst>10.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="15"><twSrc BELType='FF'>wb_interface/rxreg_20</twSrc><twDest BELType='FF'>wb_interface/rxreg_15</twDest><twLogLvls>1</twLogLvls><twSrcSite>SLICE_X1Y54.CLK</twSrcSite><twSrcClk twEdge ="twFalling" twArriveTime ="5.000">wb_clk_i_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X1Y54.XQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.591</twDelInfo><twComp>wb_interface/rxreg&lt;20&gt;</twComp><twBEL>wb_interface/rxreg_20</twBEL></twPathDel><twPathDel><twSite>SLICE_X0Y54.G4</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.404</twDelInfo><twComp>wb_interface/rxreg&lt;20&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X0Y54.Y</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twRising">0.707</twDelInfo><twComp>wb_interface/wb_dat_rdbk</twComp><twBEL>wb_interface/rxreg_and00001</twBEL></twPathDel><twPathDel><twSite>SLICE_X1Y50.CE</twSite><twDelType>net</twDelType><twFanCnt>2</twFanCnt><twDelInfo twEdge="twRising">1.127</twDelInfo><twComp>wb_interface/rxreg_and0000</twComp></twPathDel><twPathDel><twSite>SLICE_X1Y50.CLK</twSite><twDelType>Tceck</twDelType><twDelInfo twEdge="twRising">0.311</twDelInfo><twComp>wb_interface/rxreg&lt;15&gt;</twComp><twBEL>wb_interface/rxreg_15</twBEL></twPathDel><twLogDel>1.609</twLogDel><twRouteDel>1.531</twRouteDel><twTotDel>3.140</twTotDel><twDestClk twEdge ="twFalling" twArriveTime ="15.000">wb_clk_i_BUFGP</twDestClk><twPctLog>51.2</twPctLog><twPctRoute>48.8</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner sType="PathClass">Hold Paths: TS_wb_clk_i = PERIOD TIMEGRP &quot;wb_clk_i&quot; 10 ns HIGH 50%;
</twPathRptBanner><twPathRptBanner iPaths="1" iCriticalPaths="0" sType="EndPoint">Paths for end point wb_interface/txreg_20 (SLICE_X0Y56.CE), 1 path
</twPathRptBanner><twPathRpt anchorID="48"><twConstPath anchorID="49" twDataPathType="twDataPathMinDelay" constType="period"><twSlack>1.912</twSlack><twSrc BELType="FF">wb_interface/txreg_20</twSrc><twDest BELType="FF">wb_interface/txreg_20</twDest><twTotPathDel>1.912</twTotPathDel><twClkSkew>0.000</twClkSkew><twDelConst>0.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="15"><twSrc BELType='FF'>wb_interface/txreg_20</twSrc><twDest BELType='FF'>wb_interface/txreg_20</twDest><twLogLvls>1</twLogLvls><twSrcSite>SLICE_X0Y56.CLK</twSrcSite><twSrcClk twEdge ="twFalling" twArriveTime ="15.000">wb_clk_i_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X0Y56.XQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.505</twDelInfo><twComp>wb_interface/txreg&lt;20&gt;</twComp><twBEL>wb_interface/txreg_20</twBEL></twPathDel><twPathDel><twSite>SLICE_X1Y56.F1</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.377</twDelInfo><twComp>wb_interface/txreg&lt;20&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X1Y56.X</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twFalling">0.514</twDelInfo><twComp>wb_interface/txreg_and0000</twComp><twBEL>wb_interface/txreg_and00001</twBEL></twPathDel><twPathDel><twSite>SLICE_X0Y56.CE</twSite><twDelType>net</twDelType><twFanCnt>9</twFanCnt><twDelInfo twEdge="twFalling">0.516</twDelInfo><twComp>wb_interface/txreg_and0000</twComp></twPathDel><twPathDel twHoldTime="TRUE"><twSite>SLICE_X0Y56.CLK</twSite><twDelType>Tckce</twDelType><twDelInfo twEdge="twFalling">0.000</twDelInfo><twComp>wb_interface/txreg&lt;20&gt;</twComp><twBEL>wb_interface/txreg_20</twBEL></twPathDel><twLogDel>1.019</twLogDel><twRouteDel>0.893</twRouteDel><twTotDel>1.912</twTotDel><twDestClk twEdge ="twFalling" twArriveTime ="15.000">wb_clk_i_BUFGP</twDestClk><twPctLog>53.3</twPctLog><twPctRoute>46.7</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner iPaths="1" iCriticalPaths="0" sType="EndPoint">Paths for end point wb_interface/txreg_17 (SLICE_X0Y56.CE), 1 path
</twPathRptBanner><twPathRpt anchorID="50"><twConstPath anchorID="51" twDataPathType="twDataPathMinDelay" constType="period"><twSlack>1.912</twSlack><twSrc BELType="FF">wb_interface/txreg_20</twSrc><twDest BELType="FF">wb_interface/txreg_17</twDest><twTotPathDel>1.912</twTotPathDel><twClkSkew>0.000</twClkSkew><twDelConst>0.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="15"><twSrc BELType='FF'>wb_interface/txreg_20</twSrc><twDest BELType='FF'>wb_interface/txreg_17</twDest><twLogLvls>1</twLogLvls><twSrcSite>SLICE_X0Y56.CLK</twSrcSite><twSrcClk twEdge ="twFalling" twArriveTime ="15.000">wb_clk_i_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X0Y56.XQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.505</twDelInfo><twComp>wb_interface/txreg&lt;20&gt;</twComp><twBEL>wb_interface/txreg_20</twBEL></twPathDel><twPathDel><twSite>SLICE_X1Y56.F1</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.377</twDelInfo><twComp>wb_interface/txreg&lt;20&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X1Y56.X</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twFalling">0.514</twDelInfo><twComp>wb_interface/txreg_and0000</twComp><twBEL>wb_interface/txreg_and00001</twBEL></twPathDel><twPathDel><twSite>SLICE_X0Y56.CE</twSite><twDelType>net</twDelType><twFanCnt>9</twFanCnt><twDelInfo twEdge="twFalling">0.516</twDelInfo><twComp>wb_interface/txreg_and0000</twComp></twPathDel><twPathDel twHoldTime="TRUE"><twSite>SLICE_X0Y56.CLK</twSite><twDelType>Tckce</twDelType><twDelInfo twEdge="twFalling">0.000</twDelInfo><twComp>wb_interface/txreg&lt;20&gt;</twComp><twBEL>wb_interface/txreg_17</twBEL></twPathDel><twLogDel>1.019</twLogDel><twRouteDel>0.893</twRouteDel><twTotDel>1.912</twTotDel><twDestClk twEdge ="twFalling" twArriveTime ="15.000">wb_clk_i_BUFGP</twDestClk><twPctLog>53.3</twPctLog><twPctRoute>46.7</twPctRoute></twDetPath></twConstPath></twPathRpt><twPathRptBanner iPaths="1" iCriticalPaths="0" sType="EndPoint">Paths for end point wb_interface/txreg_5 (SLICE_X3Y47.CE), 1 path
</twPathRptBanner><twPathRpt anchorID="52"><twConstPath anchorID="53" twDataPathType="twDataPathMinDelay" constType="period"><twSlack>1.944</twSlack><twSrc BELType="FF">wb_interface/txreg_20</twSrc><twDest BELType="FF">wb_interface/txreg_5</twDest><twTotPathDel>2.094</twTotPathDel><twClkSkew dest = "0.749" src = "0.599">-0.150</twClkSkew><twDelConst>0.000</twDelConst><twClkUncert fSysJit="0.000" fInputJit="0.000" fDCMJit="0.000" fPhaseErr="0.000" sEqu="">0.000</twClkUncert><twDetPath maxSiteLen="15"><twSrc BELType='FF'>wb_interface/txreg_20</twSrc><twDest BELType='FF'>wb_interface/txreg_5</twDest><twLogLvls>1</twLogLvls><twSrcSite>SLICE_X0Y56.CLK</twSrcSite><twSrcClk twEdge ="twFalling" twArriveTime ="15.000">wb_clk_i_BUFGP</twSrcClk><twPathDel><twSite>SLICE_X0Y56.XQ</twSite><twDelType>Tcko</twDelType><twDelInfo twEdge="twRising">0.505</twDelInfo><twComp>wb_interface/txreg&lt;20&gt;</twComp><twBEL>wb_interface/txreg_20</twBEL></twPathDel><twPathDel><twSite>SLICE_X1Y56.F1</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.377</twDelInfo><twComp>wb_interface/txreg&lt;20&gt;</twComp></twPathDel><twPathDel><twSite>SLICE_X1Y56.X</twSite><twDelType>Tilo</twDelType><twDelInfo twEdge="twFalling">0.514</twDelInfo><twComp>wb_interface/txreg_and0000</twComp><twBEL>wb_interface/txreg_and00001</twBEL></twPathDel><twPathDel><twSite>SLICE_X3Y47.CE</twSite><twDelType>net</twDelType><twFanCnt>9</twFanCnt><twDelInfo twEdge="twFalling">0.698</twDelInfo><twComp>wb_interface/txreg_and0000</twComp></twPathDel><twPathDel twHoldTime="TRUE"><twSite>SLICE_X3Y47.CLK</twSite><twDelType>Tckce</twDelType><twDelInfo twEdge="twFalling">0.000</twDelInfo><twComp>wb_interface/txreg&lt;5&gt;</twComp><twBEL>wb_interface/txreg_5</twBEL></twPathDel><twLogDel>1.019</twLogDel><twRouteDel>1.075</twRouteDel><twTotDel>2.094</twTotDel><twDestClk twEdge ="twFalling" twArriveTime ="15.000">wb_clk_i_BUFGP</twDestClk><twPctLog>48.7</twPctLog><twPctRoute>51.3</twPctRoute></twDetPath></twConstPath></twPathRpt><twPinLimitRpt anchorID="54"><twPinLimitBanner>Component Switching Limit Checks: TS_wb_clk_i = PERIOD TIMEGRP &quot;wb_clk_i&quot; 10 ns HIGH 50%;</twPinLimitBanner><twPinLimit anchorID="55" type="MINLOWPULSE" name="Trpw" slack="6.796" period="10.000" constraintValue="5.000" deviceLimit="1.602" physResource="wb_interface/txreg&lt;1&gt;/SR" logResource="wb_interface/txreg_1/SR" locationPin="SLICE_X2Y51.SR" clockNet="wb_rst_i_IBUF"/><twPinLimit anchorID="56" type="MINHIGHPULSE" name="Trpw" slack="6.796" period="10.000" constraintValue="5.000" deviceLimit="1.602" physResource="wb_interface/txreg&lt;1&gt;/SR" logResource="wb_interface/txreg_1/SR" locationPin="SLICE_X2Y51.SR" clockNet="wb_rst_i_IBUF"/><twPinLimit anchorID="57" type="MINLOWPULSE" name="Trpw" slack="6.796" period="10.000" constraintValue="5.000" deviceLimit="1.602" physResource="wb_interface/txreg&lt;1&gt;/SR" logResource="wb_interface/txreg_0/SR" locationPin="SLICE_X2Y51.SR" clockNet="wb_rst_i_IBUF"/></twPinLimitRpt></twConst><twUnmetConstCnt anchorID="58">0</twUnmetConstCnt><twDataSheet anchorID="59" twNameLen="15"><twClk2SUList anchorID="60" twDestWidth="5"><twDest>txclk</twDest><twClk2SU><twSrc>txclk</twSrc><twRiseRise>4.635</twRiseRise></twClk2SU></twClk2SUList><twClk2SUList anchorID="61" twDestWidth="8"><twDest>wb_clk_i</twDest><twClk2SU><twSrc>wb_clk_i</twSrc><twFallFall>3.140</twFallFall></twClk2SU></twClk2SUList><twOffsetTables></twOffsetTables></twDataSheet></twVerboseRpt></twBody><twSum anchorID="62"><twErrCnt>0</twErrCnt><twScore>0</twScore><twSetupScore>0</twSetupScore><twHoldScore>0</twHoldScore><twConstCov><twPathCnt>150</twPathCnt><twNetCnt>0</twNetCnt><twConnCnt>140</twConnCnt></twConstCov><twStats anchorID="63"><twMinPer>4.635</twMinPer><twFootnote number="1" /><twMaxFreq>215.750</twMaxFreq></twStats></twSum><twFoot><twFootnoteExplanation  number="1" text="The minimum period statistic assumes all single cycle delays."></twFootnoteExplanation><twTimestamp>Fri Feb 20 14:09:29 2015 </twTimestamp></twFoot><twClientInfo anchorID="64"><twClientName>Trace</twClientName><twAttrList><twAttrListItem><twName>Trace Settings</twName><twValue>

Peak Memory Usage: 188 MB
</twValue></twAttrListItem></twAttrList></twClientInfo></twReport>
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