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<a href="baud__generator_8vhd.html">Go to the documentation of this file.</a><div class="fragment"><pre class="fragment"><a name="l00001"></a>00001
<a name="l00003"></a>00003 <span class="vhdlkeyword">library </span><span class="keywordflow">ieee</span>;
<a name="l00004"></a>00004 <span class="vhdlkeyword">use </span>ieee.std_logic_1164.<span class="vhdlkeyword">all</span>;
<a name="l00005"></a>00005 <span class="vhdlkeyword">use </span>ieee.std_logic_unsigned.<span class="vhdlkeyword">all</span>;
<a name="l00006"></a>00006 <span class="vhdlkeyword">use </span>ieee.std_logic_arith.<span class="vhdlkeyword">all</span>;
<a name="l00007"></a>00007 <span class="vhdlkeyword">use </span>ieee.numeric_std.<span class="vhdlkeyword">all</span>;
<a name="l00008"></a>00008
<a name="l00010"></a><a class="code" href="classbaud__generator.html#ac442dca664056131bdaf5c92e4351e01">00010</a> <span class="vhdlkeyword">use </span>work.pkgDefinitions.<span class="vhdlkeyword">all</span>;
<a name="l00011"></a>00011
<a name="l00012"></a><a class="code" href="classbaud__generator.html">00012</a> <span class="keywordflow">entity </span><a class="code" href="classbaud__generator.html">baud_generator</a> <span class="vhdlkeyword">is</span>
<a name="l00013"></a><a class="code" href="classbaud__generator.html#ab6aed4f6f0ae3df108d9e29e513e3ad2">00013</a> <span class="vhdlkeyword">Port</span> <span class="vhdlchar">(</span> <span class="vhdlchar"><a class="code" href="classbaud__generator.html#ab6aed4f6f0ae3df108d9e29e513e3ad2" title="Reset Input.">rst</a></span> <span class="vhdlchar">:</span> <span class="vhdlkeyword">in</span> <span class="comment">STD_LOGIC</span>;
<a name="l00014"></a><a class="code" href="classbaud__generator.html#a86b40337b1eabc8f0e5ef6f0747d0048">00014</a> <span class="vhdlchar"><a class="code" href="classbaud__generator.html#a86b40337b1eabc8f0e5ef6f0747d0048" title="Clock input.">clk</a></span> <span class="vhdlchar">:</span> <span class="vhdlkeyword">in</span> <span class="comment">STD_LOGIC</span>;
<a name="l00015"></a><a class="code" href="classbaud__generator.html#afa554c45fd56e5060cc076e2edf0db7a">00015</a> <span class="vhdlchar"><a class="code" href="classbaud__generator.html#afa554c45fd56e5060cc076e2edf0db7a" title="Number of cycles to wait for baud generation.">cycle_wait</a></span> <span class="vhdlchar">:</span> <span class="vhdlkeyword">in</span> <span class="comment">STD_LOGIC_VECTOR</span> <span class="vhdlchar">(</span><span class="vhdlchar">(</span><span class="vhdlchar">nBitsLarge</span><span class="vhdlchar">-</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">)</span> <span class="vhdlkeyword">downto</span> <span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">)</span>;
<a name="l00016"></a><a class="code" href="classbaud__generator.html#ac451ec554e394c65d78e94f9aa1a2365">00016</a> <span class="vhdlchar"><a class="code" href="classbaud__generator.html#ac451ec554e394c65d78e94f9aa1a2365" title="Oversample(8x) version of baud (Used on serial_receiver)">baud_oversample</a></span> <span class="vhdlchar">:</span> <span class="vhdlkeyword">out</span> <span class="comment">std_logic</span>;
<a name="l00017"></a><a class="code" href="classbaud__generator.html#ab3c0013cf4a2db5d1f3473d97bda35a4">00017</a> <span class="vhdlchar"><a class="code" href="classbaud__generator.html#ab3c0013cf4a2db5d1f3473d97bda35a4" title="Baud generation output (Used on serial_transmitter)">baud</a></span> <span class="vhdlchar">:</span> <span class="vhdlkeyword">out</span> <span class="comment">STD_LOGIC</span><span class="vhdlchar">)</span>;
<a name="l00018"></a>00018 <span class="vhdlkeyword">end</span> <span class="vhdlchar">baud_generator</span>;
<a name="l00019"></a>00019
<a name="l00022"></a><a class="code" href="classbaud__generator_1_1_behavioral.html">00022</a> <span class="vhdlkeyword">architecture</span> Behavioral <span class="vhdlkeyword">of</span> <a class="code" href="classbaud__generator.html">baud_generator</a> is
<a name="l00023"></a>00023 <span class="vhdlkeyword">signal</span> <span class="vhdlchar">genTick</span> <span class="vhdlchar">:</span> <span class="comment">std_logic</span>;
<a name="l00024"></a>00024 <span class="vhdlkeyword">signal</span> <span class="vhdlchar">genTickOverSample</span> <span class="vhdlchar">:</span> <span class="comment">std_logic</span>;
<a name="l00025"></a>00025 <span class="vhdlkeyword">begin</span>
<a name="l00026"></a>00026 <span class="vhdlkeyword">process</span> (<a class="code" href="classbaud__generator.html#ab6aed4f6f0ae3df108d9e29e513e3ad2" title="Reset Input.">rst</a>, <a class="code" href="classbaud__generator.html#a86b40337b1eabc8f0e5ef6f0747d0048" title="Clock input.">clk</a>, <a class="code" href="classbaud__generator.html#afa554c45fd56e5060cc076e2edf0db7a" title="Number of cycles to wait for baud generation.">cycle_wait</a>)
<a name="l00027"></a>00027 <span class="vhdlkeyword">variable</span> <span class="vhdlchar">wait_clk_cycles</span> <span class="vhdlchar">:</span> <span class="comment">STD_LOGIC_VECTOR</span> <span class="vhdlchar">(</span><span class="vhdlchar">(</span><span class="vhdlchar">nBitsLarge</span><span class="vhdlchar">-</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">)</span> <span class="vhdlkeyword">downto</span> <span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">)</span>;
<a name="l00028"></a>00028 <span class="vhdlkeyword">variable</span> <span class="vhdlchar">half_cycle</span> <span class="vhdlchar">:</span> <span class="comment">STD_LOGIC_VECTOR</span> <span class="vhdlchar">(</span><span class="vhdlchar">(</span><span class="vhdlchar">nBitsLarge</span><span class="vhdlchar">-</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">)</span> <span class="vhdlkeyword">downto</span> <span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">)</span>;
<a name="l00029"></a>00029 <span class="vhdlkeyword"> begin</span>
<a name="l00030"></a>00030 <span class="vhdlkeyword">if</span> <span class="vhdlchar"><a class="code" href="classbaud__generator.html#ab6aed4f6f0ae3df108d9e29e513e3ad2" title="Reset Input.">rst</a></span> <span class="vhdlchar">=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">'</span> <span class="vhdlkeyword">then</span>
<a name="l00031"></a>00031 <span class="vhdlchar">wait_clk_cycles</span> <span class="vhdlchar">:=</span> <span class="vhdlchar">(</span><span class="vhdlkeyword">others</span> <span class="vhdlchar">=</span><span class="vhdlchar">></span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span><span class="vhdlchar">)</span>;
<a name="l00032"></a>00032 <span class="vhdlchar">half_cycle</span> <span class="vhdlchar">:=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span> <span class="vhdlchar">&</span> <span class="vhdlchar"><a class="code" href="classbaud__generator.html#afa554c45fd56e5060cc076e2edf0db7a" title="Number of cycles to wait for baud generation.">cycle_wait</a></span><span class="vhdlchar">(</span><span class="vhdlchar"><a class="code" href="classbaud__generator.html#afa554c45fd56e5060cc076e2edf0db7a" title="Number of cycles to wait for baud generation.">cycle_wait</a></span><span class="vhdlchar">'</span><span class="vhdlchar">high</span> <span class="vhdlkeyword">downto</span> <span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">)</span>;
<a name="l00033"></a>00033 <span class="vhdlchar">genTick</span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span>;
<a name="l00034"></a>00034 <span class="vhdlkeyword">elsif</span> <span class="vhdlchar">rising_edge</span><span class="vhdlchar">(</span><span class="vhdlchar"><a class="code" href="classbaud__generator.html#a86b40337b1eabc8f0e5ef6f0747d0048" title="Clock input.">clk</a></span><span class="vhdlchar">)</span> <span class="vhdlkeyword">then</span><span class="keyword"></span>
<a name="l00035"></a>00035 <span class="keyword"> -- Just decremented the cycle_wait by one because genTick would be updated <span class="vhdlkeyword">on</span> the <span class="vhdlkeyword">next</span> cycle</span><span class="keyword"></span>
<a name="l00036"></a>00036 <span class="keyword"> -- <span class="vhdlkeyword">and</span> we really want <span class="vhdlkeyword">to</span> bring genTick <= '1' <span class="vhdlkeyword">when</span> (wait_clk_cycles = cycle_wait)</span>
<a name="l00037"></a>00037 <span class="vhdlkeyword">if</span> <span class="vhdlchar">wait_clk_cycles</span> <span class="vhdlchar">=</span> <span class="vhdlchar">(</span><span class="vhdlchar"><a class="code" href="classbaud__generator.html#afa554c45fd56e5060cc076e2edf0db7a" title="Number of cycles to wait for baud generation.">cycle_wait</a></span> <span class="vhdlchar">-</span> <span class="vhdlchar">conv_std_logic_vector</span><span class="vhdlchar">(</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">,</span> <span class="vhdlchar">nBitsLarge</span><span class="vhdlchar">)</span><span class="vhdlchar">)</span> <span class="vhdlkeyword">then</span>
<a name="l00038"></a>00038 <span class="vhdlchar">genTick</span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">'</span>;
<a name="l00039"></a>00039 <span class="vhdlchar">wait_clk_cycles</span> <span class="vhdlchar">:=</span> <span class="vhdlchar">(</span><span class="vhdlkeyword">others</span> <span class="vhdlchar">=</span><span class="vhdlchar">></span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span><span class="vhdlchar">)</span>;
<a name="l00040"></a>00040 <span class="vhdlkeyword">else</span>
<a name="l00041"></a>00041 <span class="vhdlchar">wait_clk_cycles</span> <span class="vhdlchar">:=</span> <span class="vhdlchar">wait_clk_cycles</span> <span class="vhdlchar">+</span> <span class="vhdlchar">conv_std_logic_vector</span><span class="vhdlchar">(</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">,</span> <span class="vhdlchar">nBitsLarge</span><span class="vhdlchar">)</span>; <span class="keyword"></span>
<a name="l00042"></a>00042 <span class="keyword"> -- <span class="vhdlkeyword">If</span> we're at half <span class="vhdlkeyword">of</span> the cycle</span>
<a name="l00043"></a>00043 <span class="vhdlkeyword">if</span> <span class="vhdlchar">wait_clk_cycles</span> <span class="vhdlchar">=</span> <span class="vhdlchar">half_cycle</span> <span class="vhdlkeyword">then</span>
<a name="l00044"></a>00044 <span class="vhdlchar">genTick</span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span>;
<a name="l00045"></a>00045 <span class="vhdlkeyword">end</span> <span class="vhdlkeyword">if</span>;
<a name="l00046"></a>00046 <span class="vhdlkeyword">end</span> <span class="vhdlkeyword">if</span>;
<a name="l00047"></a>00047 <span class="keyword"></span>
<a name="l00048"></a>00048 <span class="keyword"> -- Avoid creation <span class="vhdlkeyword">of</span> transparent latch (By <span class="vhdlkeyword">default</span> the VHDL will create an <span class="vhdlkeyword">register</span> <span class="vhdlkeyword">for</span> vectors that are assigned only <span class="vhdlkeyword">in</span> one</span><span class="keyword"></span>
<a name="l00049"></a>00049 <span class="keyword"> -- ocasion <span class="vhdlkeyword">of</span> a (<span class="vhdlkeyword">if</span>, <span class="vhdlkeyword">case</span>) instruction</span>
<a name="l00050"></a>00050 <span class="vhdlchar">half_cycle</span> <span class="vhdlchar">:=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span> <span class="vhdlchar">&</span> <span class="vhdlchar"><a class="code" href="classbaud__generator.html#afa554c45fd56e5060cc076e2edf0db7a" title="Number of cycles to wait for baud generation.">cycle_wait</a></span><span class="vhdlchar">(</span><span class="vhdlchar"><a class="code" href="classbaud__generator.html#afa554c45fd56e5060cc076e2edf0db7a" title="Number of cycles to wait for baud generation.">cycle_wait</a></span><span class="vhdlchar">'</span><span class="vhdlchar">high</span> <span class="vhdlkeyword">downto</span> <span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">)</span>;
<a name="l00051"></a>00051 <span class="vhdlkeyword">end</span> <span class="vhdlkeyword">if</span>;
<a name="l00052"></a>00052 <span class="vhdlkeyword">end</span> <span class="vhdlkeyword">process</span>;
<a name="l00053"></a>00053
<a name="l00054"></a>00054 <span class="vhdlchar"><a class="code" href="classbaud__generator.html#ab3c0013cf4a2db5d1f3473d97bda35a4" title="Baud generation output (Used on serial_transmitter)">baud</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">genTick</span>;
<a name="l00055"></a>00055 <span class="vhdlchar"><a class="code" href="classbaud__generator.html#ac451ec554e394c65d78e94f9aa1a2365" title="Oversample(8x) version of baud (Used on serial_receiver)">baud_oversample</a></span> <span class="vhdlchar"><=</span> <span class="vhdlchar">genTickOverSample</span>;
<a name="l00056"></a>00056 <span class="keyword"></span>
<a name="l00057"></a>00057 <span class="keyword"> -- <span class="vhdlkeyword">Process</span> <span class="vhdlkeyword">to</span> <span class="vhdlkeyword">generate</span> the overclocked (</span><span class="vhdllogic">8x</span>) sample
<a name="l00058"></a>00058 <span class="vhdlkeyword">process</span> (<a class="code" href="classbaud__generator.html#ab6aed4f6f0ae3df108d9e29e513e3ad2" title="Reset Input.">rst</a>, <a class="code" href="classbaud__generator.html#a86b40337b1eabc8f0e5ef6f0747d0048" title="Clock input.">clk</a>, <a class="code" href="classbaud__generator.html#afa554c45fd56e5060cc076e2edf0db7a" title="Number of cycles to wait for baud generation.">cycle_wait</a>)
<a name="l00059"></a>00059 <span class="vhdlkeyword">variable</span> <span class="vhdlchar">wait_clk_cycles</span> <span class="vhdlchar">:</span> <span class="comment">STD_LOGIC_VECTOR</span> <span class="vhdlchar">(</span><span class="vhdlchar">(</span><span class="vhdlchar">nBitsLarge</span><span class="vhdlchar">-</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">)</span> <span class="vhdlkeyword">downto</span> <span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">)</span>;
<a name="l00060"></a>00060 <span class="vhdlkeyword">variable</span> <span class="vhdlchar">half_cycle</span> <span class="vhdlchar">:</span> <span class="comment">STD_LOGIC_VECTOR</span> <span class="vhdlchar">(</span><span class="vhdlchar">(</span><span class="vhdlchar">nBitsLarge</span><span class="vhdlchar">-</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">)</span> <span class="vhdlkeyword">downto</span> <span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">)</span>;
<a name="l00061"></a>00061 <span class="vhdlkeyword">variable</span> <span class="vhdlchar">cycle_wait_oversample</span> <span class="vhdlchar">:</span> <span class="comment">STD_LOGIC_VECTOR</span> <span class="vhdlchar">(</span><span class="vhdlchar">(</span><span class="vhdlchar">nBitsLarge</span><span class="vhdlchar">-</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">)</span> <span class="vhdlkeyword">downto</span> <span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">)</span>;
<a name="l00062"></a>00062 <span class="vhdlkeyword"> begin</span>
<a name="l00063"></a>00063 <span class="vhdlkeyword">if</span> <span class="vhdlchar"><a class="code" href="classbaud__generator.html#ab6aed4f6f0ae3df108d9e29e513e3ad2" title="Reset Input.">rst</a></span> <span class="vhdlchar">=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">'</span> <span class="vhdlkeyword">then</span>
<a name="l00064"></a>00064 <span class="vhdlchar">wait_clk_cycles</span> <span class="vhdlchar">:=</span> <span class="vhdlchar">(</span><span class="vhdlkeyword">others</span> <span class="vhdlchar">=</span><span class="vhdlchar">></span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span><span class="vhdlchar">)</span>;
<a name="l00065"></a>00065 <span class="keyword"></span>
<a name="l00066"></a>00066 <span class="keyword"> -- Divide cycle_wait by </span><span class="vhdllogic">8</span><span class="keyword"></span>
<a name="l00067"></a>00067 <span class="keyword"> --cycle_wait_oversample := '0' & cycle_wait(cycle_wait'high <span class="vhdlkeyword">downto</span> </span><span class="vhdllogic">1</span>); <span class="keyword"></span>
<a name="l00068"></a>00068 <span class="keyword"> --cycle_wait_oversample := '0' & cycle_wait_oversample(cycle_wait_oversample'high <span class="vhdlkeyword">downto</span> </span><span class="vhdllogic">1</span>);<span class="keyword"></span>
<a name="l00069"></a>00069 <span class="keyword"> --cycle_wait_oversample := '0' & cycle_wait_oversample(cycle_wait_oversample'high <span class="vhdlkeyword">downto</span> </span><span class="vhdllogic">1</span>);
<a name="l00070"></a>00070 <span class="vhdlchar">cycle_wait_oversample</span> <span class="vhdlchar">:=</span> <span class="vhdllogic">"000"</span> <span class="vhdlchar">&</span> <span class="vhdlchar"><a class="code" href="classbaud__generator.html#afa554c45fd56e5060cc076e2edf0db7a" title="Number of cycles to wait for baud generation.">cycle_wait</a></span><span class="vhdlchar">(</span><span class="vhdlchar"><a class="code" href="classbaud__generator.html#afa554c45fd56e5060cc076e2edf0db7a" title="Number of cycles to wait for baud generation.">cycle_wait</a></span><span class="vhdlchar">'</span><span class="vhdlchar">high</span> <span class="vhdlkeyword">downto</span> <span class="vhdllogic"></span><span class="vhdllogic">3</span><span class="vhdlchar">)</span>;<span class="keyword"> -- Shift right by </span><span class="vhdllogic">3</span>
<a name="l00071"></a>00071
<a name="l00072"></a>00072 <span class="keyword"></span>
<a name="l00073"></a>00073 <span class="keyword"> -- Half <span class="vhdlkeyword">of</span> cycle_wait_oversample</span>
<a name="l00074"></a>00074 <span class="vhdlchar">half_cycle</span> <span class="vhdlchar">:=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span> <span class="vhdlchar">&</span> <span class="vhdlchar">cycle_wait_oversample</span><span class="vhdlchar">(</span><span class="vhdlchar">cycle_wait_oversample</span><span class="vhdlchar">'</span><span class="vhdlchar">high</span> <span class="vhdlkeyword">downto</span> <span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">)</span>;<span class="keyword"> -- Shift right by </span><span class="vhdllogic">1</span>
<a name="l00075"></a>00075 <span class="vhdlchar">genTickOverSample</span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span>;
<a name="l00076"></a>00076 <span class="vhdlkeyword">elsif</span> <span class="vhdlchar">rising_edge</span><span class="vhdlchar">(</span><span class="vhdlchar"><a class="code" href="classbaud__generator.html#a86b40337b1eabc8f0e5ef6f0747d0048" title="Clock input.">clk</a></span><span class="vhdlchar">)</span> <span class="vhdlkeyword">then</span><span class="keyword"></span>
<a name="l00077"></a>00077 <span class="keyword"> -- Just decremented the cycle_wait by one because genTick would be updated <span class="vhdlkeyword">on</span> the <span class="vhdlkeyword">next</span> cycle</span><span class="keyword"></span>
<a name="l00078"></a>00078 <span class="keyword"> -- <span class="vhdlkeyword">and</span> we really want <span class="vhdlkeyword">to</span> bring genTick <= '1' <span class="vhdlkeyword">when</span> (wait_clk_cycles = cycle_wait)</span>
<a name="l00079"></a>00079 <span class="vhdlkeyword">if</span> <span class="vhdlchar">wait_clk_cycles</span> <span class="vhdlchar">=</span> <span class="vhdlchar">(</span><span class="vhdlchar">cycle_wait_oversample</span> <span class="vhdlchar">-</span> <span class="vhdlchar">conv_std_logic_vector</span><span class="vhdlchar">(</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">,</span> <span class="vhdlchar">nBitsLarge</span><span class="vhdlchar">)</span><span class="vhdlchar">)</span> <span class="vhdlkeyword">then</span>
<a name="l00080"></a>00080 <span class="vhdlchar">genTickOverSample</span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">'</span>;
<a name="l00081"></a>00081 <span class="vhdlchar">wait_clk_cycles</span> <span class="vhdlchar">:=</span> <span class="vhdlchar">(</span><span class="vhdlkeyword">others</span> <span class="vhdlchar">=</span><span class="vhdlchar">></span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span><span class="vhdlchar">)</span>;
<a name="l00082"></a>00082 <span class="vhdlkeyword">else</span>
<a name="l00083"></a>00083 <span class="vhdlchar">wait_clk_cycles</span> <span class="vhdlchar">:=</span> <span class="vhdlchar">wait_clk_cycles</span> <span class="vhdlchar">+</span> <span class="vhdlchar">conv_std_logic_vector</span><span class="vhdlchar">(</span><span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">,</span> <span class="vhdlchar">nBitsLarge</span><span class="vhdlchar">)</span>; <span class="keyword"></span>
<a name="l00084"></a>00084 <span class="keyword"> -- <span class="vhdlkeyword">If</span> we're at half <span class="vhdlkeyword">of</span> the cycle</span>
<a name="l00085"></a>00085 <span class="vhdlkeyword">if</span> <span class="vhdlchar">wait_clk_cycles</span> <span class="vhdlchar">=</span> <span class="vhdlchar">half_cycle</span> <span class="vhdlkeyword">then</span>
<a name="l00086"></a>00086 <span class="vhdlchar">genTickOverSample</span> <span class="vhdlchar"><=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span>;
<a name="l00087"></a>00087 <span class="vhdlkeyword">end</span> <span class="vhdlkeyword">if</span>;
<a name="l00088"></a>00088 <span class="vhdlkeyword">end</span> <span class="vhdlkeyword">if</span>;
<a name="l00089"></a>00089 <span class="keyword"></span>
<a name="l00090"></a>00090 <span class="keyword"> -- Avoid creation <span class="vhdlkeyword">of</span> transparent latch (By <span class="vhdlkeyword">default</span> the VHDL will create an <span class="vhdlkeyword">register</span> <span class="vhdlkeyword">for</span> vectors that are assigned only <span class="vhdlkeyword">in</span> one</span><span class="keyword"></span>
<a name="l00091"></a>00091 <span class="keyword"> -- ocasion <span class="vhdlkeyword">of</span> a (<span class="vhdlkeyword">if</span>, <span class="vhdlkeyword">case</span>) instruction</span>
<a name="l00092"></a>00092 <span class="vhdlchar">cycle_wait_oversample</span> <span class="vhdlchar">:=</span> <span class="vhdllogic">"000"</span> <span class="vhdlchar">&</span> <span class="vhdlchar"><a class="code" href="classbaud__generator.html#afa554c45fd56e5060cc076e2edf0db7a" title="Number of cycles to wait for baud generation.">cycle_wait</a></span><span class="vhdlchar">(</span><span class="vhdlchar"><a class="code" href="classbaud__generator.html#afa554c45fd56e5060cc076e2edf0db7a" title="Number of cycles to wait for baud generation.">cycle_wait</a></span><span class="vhdlchar">'</span><span class="vhdlchar">high</span> <span class="vhdlkeyword">downto</span> <span class="vhdllogic"></span><span class="vhdllogic">3</span><span class="vhdlchar">)</span>;
<a name="l00093"></a>00093 <span class="vhdlchar">half_cycle</span> <span class="vhdlchar">:=</span> <span class="vhdlchar">'</span><span class="vhdllogic"></span><span class="vhdllogic">0</span><span class="vhdlchar">'</span> <span class="vhdlchar">&</span> <span class="vhdlchar">cycle_wait_oversample</span><span class="vhdlchar">(</span><span class="vhdlchar">cycle_wait_oversample</span><span class="vhdlchar">'</span><span class="vhdlchar">high</span> <span class="vhdlkeyword">downto</span> <span class="vhdllogic"></span><span class="vhdllogic">1</span><span class="vhdlchar">)</span>;
<a name="l00094"></a>00094 <span class="vhdlkeyword">end</span> <span class="vhdlkeyword">if</span>;
<a name="l00095"></a>00095 <span class="vhdlkeyword">end</span> <span class="vhdlkeyword">process</span>;
<a name="l00096"></a>00096
<a name="l00097"></a>00097 <span class="vhdlkeyword">end</span> <span class="vhdlchar">Behavioral</span>;
<a name="l00098"></a>00098
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