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<p>Test divisor module.
<a href="classtest_divisor_1_1behavior.html#details">More...</a></p>
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<table class="memberdecls">
<tr><td colspan="2"><h2><a name="Processes"></a>
Processes</h2></td></tr>
<tr class="memitem:ac5bb218131b813f7908ec89476b31fca"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ac5bb218131b813f7908ec89476b31fca"></a>
<a class="el" href="classtest_divisor_1_1behavior.html#ac5bb218131b813f7908ec89476b31fca">clk_process</a> </td><td class="memItemRight" valign="bottom"><b> ( )</b></td></tr>
<tr class="memitem:ad2efa6785cff833c341e27596b21aeb5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ad2efa6785cff833c341e27596b21aeb5"></a>
<a class="el" href="classtest_divisor_1_1behavior.html#ad2efa6785cff833c341e27596b21aeb5">stim_proc</a> </td><td class="memItemRight" valign="bottom"><b> ( )</b></td></tr>
<tr><td colspan="2"><h2><a name="Components"></a>
Components</h2></td></tr>
<tr class="memitem:ab31bbf4e04b601f06da44e54e616cc99"><td class="memItemLeft" align="right" valign="top"><a class="el" href="classtest_divisor_1_1behavior.html#ab31bbf4e04b601f06da44e54e616cc99">divisor</a> </td><td class="memItemRight" valign="bottom"> <b></b> <em><a class="el" href="classdivisor.html"><Entity divisor> </a></em></td></tr>
<tr class="memdesc:ab31bbf4e04b601f06da44e54e616cc99"><td class="mdescLeft"> </td><td class="mdescRight">Reset input. <a href="#ab31bbf4e04b601f06da44e54e616cc99"></a><br/></td></tr>
<tr><td colspan="2"><h2><a name="Constants"></a>
Constants</h2></td></tr>
<tr class="memitem:aee75ea6d5c1621041dff5db20cba7e70"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="aee75ea6d5c1621041dff5db20cba7e70"></a>
<a class="el" href="classtest_divisor_1_1behavior.html#aee75ea6d5c1621041dff5db20cba7e70">clk_period</a>  </td><td class="memItemRight" valign="bottom"><b><span class="comment">time</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">:</span><span class="vhdlchar">=</span><span class="vhdlchar"> </span> <span class="vhdldigit">10</span> <span class="vhdlchar"> </span><span class="vhdlchar">ns</span><span class="vhdlchar"> </span></b></td></tr>
<tr><td colspan="2"><h2><a name="Signals"></a>
Signals</h2></td></tr>
<tr class="memitem:a513fa2f18065f5d31a856b5a7268e6be"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a513fa2f18065f5d31a856b5a7268e6be"></a>
<a class="el" href="classtest_divisor_1_1behavior.html#a513fa2f18065f5d31a856b5a7268e6be">rst</a>  </td><td class="memItemRight" valign="bottom"><b><span class="comment">std_logic</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">:</span><span class="vhdlchar">=</span><span class="vhdlchar"> </span><span class="vhdlchar">'</span><span class="vhdlchar"> </span> <span class="vhdldigit">0</span> <span class="vhdlchar"> </span><span class="vhdlchar">'</span><span class="vhdlchar"> </span></b></td></tr>
<tr class="memdesc:a513fa2f18065f5d31a856b5a7268e6be"><td class="mdescLeft"> </td><td class="mdescRight">Signal to connect with UUT. <br/></td></tr>
<tr class="memitem:ad8d4742a7eb2e3d3a95e8c0c37d14ed2"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ad8d4742a7eb2e3d3a95e8c0c37d14ed2"></a>
<a class="el" href="classtest_divisor_1_1behavior.html#ad8d4742a7eb2e3d3a95e8c0c37d14ed2">clk</a>  </td><td class="memItemRight" valign="bottom"><b><span class="comment">std_logic</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">:</span><span class="vhdlchar">=</span><span class="vhdlchar"> </span><span class="vhdlchar">'</span><span class="vhdlchar"> </span> <span class="vhdldigit">0</span> <span class="vhdlchar"> </span><span class="vhdlchar">'</span><span class="vhdlchar"> </span></b></td></tr>
<tr class="memdesc:ad8d4742a7eb2e3d3a95e8c0c37d14ed2"><td class="mdescLeft"> </td><td class="mdescRight">Signal to connect with UUT. <br/></td></tr>
<tr class="memitem:ab6d0f470182dc53c3c65afad4c78bddd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ab6d0f470182dc53c3c65afad4c78bddd"></a>
<a class="el" href="classtest_divisor_1_1behavior.html#ab6d0f470182dc53c3c65afad4c78bddd">numerator</a>  </td><td class="memItemRight" valign="bottom"><b><span class="comment">std_logic_vector</span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar">nBitsLarge</span><span class="vhdlchar"> </span><span class="vhdlchar">-</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span> <span class="vhdldigit">1</span> <span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlkeyword">downto</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar"> </span> <span class="vhdldigit">0</span> <span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">:</span><span class="vhdlchar">=</span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlkeyword">others</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">=</span><span class="vhdlchar"> </span><span class="vhdlchar">></span><span class="vhdlchar"> </span><span class="vhdlchar">'</span><span class="vhdlchar"> </span> <span class="vhdldigit">0</span> <span class="vhdlchar"> </span><span class="vhdlchar">'</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></td></tr>
<tr class="memdesc:ab6d0f470182dc53c3c65afad4c78bddd"><td class="mdescLeft"> </td><td class="mdescRight">Signal to connect with UUT. <br/></td></tr>
<tr class="memitem:a45d3fd79b3d4a9c68e45d5bfd00d1fc7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a45d3fd79b3d4a9c68e45d5bfd00d1fc7"></a>
<a class="el" href="classtest_divisor_1_1behavior.html#a45d3fd79b3d4a9c68e45d5bfd00d1fc7">divident</a>  </td><td class="memItemRight" valign="bottom"><b><span class="comment">std_logic_vector</span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar">nBitsLarge</span><span class="vhdlchar"> </span><span class="vhdlchar">-</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span> <span class="vhdldigit">1</span> <span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlkeyword">downto</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar"> </span> <span class="vhdldigit">0</span> <span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">:</span><span class="vhdlchar">=</span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlkeyword">others</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">=</span><span class="vhdlchar"> </span><span class="vhdlchar">></span><span class="vhdlchar"> </span><span class="vhdlchar">'</span><span class="vhdlchar"> </span> <span class="vhdldigit">0</span> <span class="vhdlchar"> </span><span class="vhdlchar">'</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></td></tr>
<tr class="memdesc:a45d3fd79b3d4a9c68e45d5bfd00d1fc7"><td class="mdescLeft"> </td><td class="mdescRight">Signal to connect with UUT. <br/></td></tr>
<tr class="memitem:a0a9f54386a9ef858f70c32ccceb1ab0e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a0a9f54386a9ef858f70c32ccceb1ab0e"></a>
<a class="el" href="classtest_divisor_1_1behavior.html#a0a9f54386a9ef858f70c32ccceb1ab0e">quotient</a>  </td><td class="memItemRight" valign="bottom"><b><span class="comment">std_logic_vector</span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar">nBitsLarge</span><span class="vhdlchar"> </span><span class="vhdlchar">-</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span> <span class="vhdldigit">1</span> <span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlkeyword">downto</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar"> </span> <span class="vhdldigit">0</span> <span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></td></tr>
<tr class="memdesc:a0a9f54386a9ef858f70c32ccceb1ab0e"><td class="mdescLeft"> </td><td class="mdescRight">Signal to connect with UUT. <br/></td></tr>
<tr class="memitem:a4192e4decb5e0fff313ed7578a1fe6a5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a4192e4decb5e0fff313ed7578a1fe6a5"></a>
<a class="el" href="classtest_divisor_1_1behavior.html#a4192e4decb5e0fff313ed7578a1fe6a5">reminder</a>  </td><td class="memItemRight" valign="bottom"><b><span class="comment">std_logic_vector</span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar">nBitsLarge</span><span class="vhdlchar"> </span><span class="vhdlchar">-</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span> <span class="vhdldigit">1</span> <span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlkeyword">downto</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar"> </span> <span class="vhdldigit">0</span> <span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></td></tr>
<tr class="memdesc:a4192e4decb5e0fff313ed7578a1fe6a5"><td class="mdescLeft"> </td><td class="mdescRight">Signal to connect with UUT. <br/></td></tr>
<tr class="memitem:a52b926bb7d7b6f608cf22d09d17be95a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a52b926bb7d7b6f608cf22d09d17be95a"></a>
<a class="el" href="classtest_divisor_1_1behavior.html#a52b926bb7d7b6f608cf22d09d17be95a">done</a>  </td><td class="memItemRight" valign="bottom"><b><span class="comment">std_logic</span><span class="vhdlchar"> </span></b></td></tr>
<tr><td colspan="2"><h2><a name="Instantiations"></a>
Instantiations</h2></td></tr>
<tr class="memitem:a1619316ad715601eb5d3559db829ac05"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a1619316ad715601eb5d3559db829ac05"></a>
<a class="el" href="classtest_divisor_1_1behavior.html#a1619316ad715601eb5d3559db829ac05">uut</a> </td><td class="memItemRight" valign="bottom"> <b>divisor</b> <em><a class="el" href="classdivisor.html"><Entity divisor></a></em></td></tr>
<tr class="memdesc:a1619316ad715601eb5d3559db829ac05"><td class="mdescLeft"> </td><td class="mdescRight">Instantiate the Unit Under Test (UUT) <br/></td></tr>
</table>
<hr/><a name="details" id="details"></a><h2>Detailed Description</h2>
<div class="textblock"><p>Test divisor module. </p>
<p>Calculate some divisions and verify if we have the right value </p>
<p>Definition at line <a class="el" href="test_divisor_8vhd_source.html#l00017">17</a> of file <a class="el" href="test_divisor_8vhd_source.html">testDivisor.vhd</a>.</p>
</div><hr/><h2>Member Data Documentation</h2>
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<td class="memname"><a class="el" href="classtest_divisor_1_1behavior.html#ab31bbf4e04b601f06da44e54e616cc99">divisor</a> <b><span class="vhdlchar"> </span></b> <code> [Component]</code></td>
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<div class="memdoc">
<p>Reset input. </p>
<p>Clock input Division result (32 bits) Reminder result (32 bits) Numerator (32 bits) "Divide by" number (32 bits) </p>
<p>Definition at line <a class="el" href="test_divisor_8vhd_source.html#l00021">21</a> of file <a class="el" href="test_divisor_8vhd_source.html">testDivisor.vhd</a>.</p>
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<hr/>The documentation for this class was generated from the following files:<ul>
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