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Processes</h2></td></tr>
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<tr class="memitem:ad2efa6785cff833c341e27596b21aeb5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ad2efa6785cff833c341e27596b21aeb5"></a>
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Components</h2></td></tr>
<tr class="memitem:a7a7412e3b159b0289f620fa9ce2773b4"><td class="memItemLeft" align="right" valign="top"><a class="el" href="classtest_uart__control_1_1behavior.html#a7a7412e3b159b0289f620fa9ce2773b4">uart_control</a> </td><td class="memItemRight" valign="bottom"> <b></b> <em><a class="el" href="classuart__control.html"><Entity uart_control> </a></em></td></tr>
<tr class="memdesc:a7a7412e3b159b0289f620fa9ce2773b4"><td class="mdescLeft"> </td><td class="mdescRight">Global reset. <a href="#a7a7412e3b159b0289f620fa9ce2773b4"></a><br/></td></tr>
<tr><td colspan="2"><h2><a name="Constants"></a>
Constants</h2></td></tr>
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<a class="el" href="classtest_uart__control_1_1behavior.html#a732bfb9cc259526701d9009e857e3634">clk_period</a>  </td><td class="memItemRight" valign="bottom"><b><span class="comment">time</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">:</span><span class="vhdlchar">=</span><span class="vhdlchar"> </span> <span class="vhdldigit">20</span> <span class="vhdlchar"> </span><span class="vhdlchar">ns</span><span class="vhdlchar"> </span></b></td></tr>
<tr><td colspan="2"><h2><a name="Signals"></a>
Signals</h2></td></tr>
<tr class="memitem:a3366a143573fb930480d87caf161678a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a3366a143573fb930480d87caf161678a"></a>
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<tr class="memdesc:a3366a143573fb930480d87caf161678a"><td class="mdescLeft"> </td><td class="mdescRight">Signal to connect with UUT. <br/></td></tr>
<tr class="memitem:a80022b7325ee7ece0351f096c061915c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a80022b7325ee7ece0351f096c061915c"></a>
<a class="el" href="classtest_uart__control_1_1behavior.html#a80022b7325ee7ece0351f096c061915c">clk</a>  </td><td class="memItemRight" valign="bottom"><b><span class="comment">std_logic</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">:</span><span class="vhdlchar">=</span><span class="vhdlchar"> </span><span class="vhdlchar">'</span><span class="vhdlchar"> </span> <span class="vhdldigit">0</span> <span class="vhdlchar"> </span><span class="vhdlchar">'</span><span class="vhdlchar"> </span></b></td></tr>
<tr class="memdesc:a80022b7325ee7ece0351f096c061915c"><td class="mdescLeft"> </td><td class="mdescRight">Signal to connect with UUT. <br/></td></tr>
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<a class="el" href="classtest_uart__control_1_1behavior.html#a9908e5282e8d97753f43518d9cb826cd">WE</a>  </td><td class="memItemRight" valign="bottom"><b><span class="comment">std_logic</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">:</span><span class="vhdlchar">=</span><span class="vhdlchar"> </span><span class="vhdlchar">'</span><span class="vhdlchar"> </span> <span class="vhdldigit">0</span> <span class="vhdlchar"> </span><span class="vhdlchar">'</span><span class="vhdlchar"> </span></b></td></tr>
<tr class="memdesc:a9908e5282e8d97753f43518d9cb826cd"><td class="mdescLeft"> </td><td class="mdescRight">Signal to connect with UUT. <br/></td></tr>
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<a class="el" href="classtest_uart__control_1_1behavior.html#a2617c016d93a2d14227b30d854f9e883">reg_addr</a>  </td><td class="memItemRight" valign="bottom"><b><span class="comment">std_logic_vector</span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span> <span class="vhdldigit">1</span> <span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlkeyword">downto</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar"> </span> <span class="vhdldigit">0</span> <span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">:</span><span class="vhdlchar">=</span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlkeyword">others</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">=</span><span class="vhdlchar"> </span><span class="vhdlchar">></span><span class="vhdlchar"> </span><span class="vhdlchar">'</span><span class="vhdlchar"> </span> <span class="vhdldigit">0</span> <span class="vhdlchar"> </span><span class="vhdlchar">'</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></td></tr>
<tr class="memdesc:a2617c016d93a2d14227b30d854f9e883"><td class="mdescLeft"> </td><td class="mdescRight">Signal to connect with UUT. <br/></td></tr>
<tr class="memitem:a3fcca4de2b35414fb663ee97c53ee658"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a3fcca4de2b35414fb663ee97c53ee658"></a>
<a class="el" href="classtest_uart__control_1_1behavior.html#a3fcca4de2b35414fb663ee97c53ee658">start</a>  </td><td class="memItemRight" valign="bottom"><b><span class="comment">std_logic</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">:</span><span class="vhdlchar">=</span><span class="vhdlchar"> </span><span class="vhdlchar">'</span><span class="vhdlchar"> </span> <span class="vhdldigit">0</span> <span class="vhdlchar"> </span><span class="vhdlchar">'</span><span class="vhdlchar"> </span></b></td></tr>
<tr class="memdesc:a3fcca4de2b35414fb663ee97c53ee658"><td class="mdescLeft"> </td><td class="mdescRight">Signal to connect with UUT. <br/></td></tr>
<tr class="memitem:ac02e98da1e86d92785f262e5c1ca0a94"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ac02e98da1e86d92785f262e5c1ca0a94"></a>
<a class="el" href="classtest_uart__control_1_1behavior.html#ac02e98da1e86d92785f262e5c1ca0a94">DAT_I</a>  </td><td class="memItemRight" valign="bottom"><b><span class="comment">std_logic_vector</span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar">nBitsLarge</span><span class="vhdlchar"> </span><span class="vhdlchar">-</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span> <span class="vhdldigit">1</span> <span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlkeyword">downto</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar"> </span> <span class="vhdldigit">0</span> <span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">:</span><span class="vhdlchar">=</span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlkeyword">others</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">=</span><span class="vhdlchar"> </span><span class="vhdlchar">></span><span class="vhdlchar"> </span><span class="vhdlchar">'</span><span class="vhdlchar"> </span> <span class="vhdldigit">0</span> <span class="vhdlchar"> </span><span class="vhdlchar">'</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></td></tr>
<tr class="memdesc:ac02e98da1e86d92785f262e5c1ca0a94"><td class="mdescLeft"> </td><td class="mdescRight">Signal to connect with UUT. <br/></td></tr>
<tr class="memitem:a2542843dc0c2f045329ede0cd8b0f29d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a2542843dc0c2f045329ede0cd8b0f29d"></a>
<a class="el" href="classtest_uart__control_1_1behavior.html#a2542843dc0c2f045329ede0cd8b0f29d">data_byte_rx</a>  </td><td class="memItemRight" valign="bottom"><b><span class="comment">std_logic_vector</span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar">nBits</span><span class="vhdlchar"> </span><span class="vhdlchar">-</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span> <span class="vhdldigit">1</span> <span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlkeyword">downto</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar"> </span> <span class="vhdldigit">0</span> <span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">:</span><span class="vhdlchar">=</span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlkeyword">others</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">=</span><span class="vhdlchar"> </span><span class="vhdlchar">></span><span class="vhdlchar"> </span><span class="vhdlchar">'</span><span class="vhdlchar"> </span> <span class="vhdldigit">0</span> <span class="vhdlchar"> </span><span class="vhdlchar">'</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></td></tr>
<tr class="memdesc:a2542843dc0c2f045329ede0cd8b0f29d"><td class="mdescLeft"> </td><td class="mdescRight">Signal to connect with UUT. <br/></td></tr>
<tr class="memitem:ac165676e87cdd92109480bfa6d5cc444"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ac165676e87cdd92109480bfa6d5cc444"></a>
<a class="el" href="classtest_uart__control_1_1behavior.html#ac165676e87cdd92109480bfa6d5cc444">tx_data_sent</a>  </td><td class="memItemRight" valign="bottom"><b><span class="comment">std_logic</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">:</span><span class="vhdlchar">=</span><span class="vhdlchar"> </span><span class="vhdlchar">'</span><span class="vhdlchar"> </span> <span class="vhdldigit">0</span> <span class="vhdlchar"> </span><span class="vhdlchar">'</span><span class="vhdlchar"> </span></b></td></tr>
<tr class="memdesc:ac165676e87cdd92109480bfa6d5cc444"><td class="mdescLeft"> </td><td class="mdescRight">Signal to connect with UUT. <br/></td></tr>
<tr class="memitem:a5a02d4c51339f0711500faf0a9f9456c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a5a02d4c51339f0711500faf0a9f9456c"></a>
<a class="el" href="classtest_uart__control_1_1behavior.html#a5a02d4c51339f0711500faf0a9f9456c">rx_data_ready</a>  </td><td class="memItemRight" valign="bottom"><b><span class="comment">std_logic</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">:</span><span class="vhdlchar">=</span><span class="vhdlchar"> </span><span class="vhdlchar">'</span><span class="vhdlchar"> </span> <span class="vhdldigit">0</span> <span class="vhdlchar"> </span><span class="vhdlchar">'</span><span class="vhdlchar"> </span></b></td></tr>
<tr class="memdesc:a5a02d4c51339f0711500faf0a9f9456c"><td class="mdescLeft"> </td><td class="mdescRight">Signal to connect with UUT. <br/></td></tr>
<tr class="memitem:af7e573dd5f4448685159c1050d974a92"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="af7e573dd5f4448685159c1050d974a92"></a>
<a class="el" href="classtest_uart__control_1_1behavior.html#af7e573dd5f4448685159c1050d974a92">done</a>  </td><td class="memItemRight" valign="bottom"><b><span class="comment">std_logic</span><span class="vhdlchar"> </span></b></td></tr>
<tr class="memdesc:af7e573dd5f4448685159c1050d974a92"><td class="mdescLeft"> </td><td class="mdescRight">Signal to connect with UUT. <br/></td></tr>
<tr class="memitem:acb24fd5efec09c4d3e95c15786f7c71d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="acb24fd5efec09c4d3e95c15786f7c71d"></a>
<a class="el" href="classtest_uart__control_1_1behavior.html#acb24fd5efec09c4d3e95c15786f7c71d">tx_start</a>  </td><td class="memItemRight" valign="bottom"><b><span class="comment">std_logic</span><span class="vhdlchar"> </span></b></td></tr>
<tr class="memdesc:acb24fd5efec09c4d3e95c15786f7c71d"><td class="mdescLeft"> </td><td class="mdescRight">Signal to connect with UUT. <br/></td></tr>
<tr class="memitem:a21b571630e861153c8507061cc4d9b8c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a21b571630e861153c8507061cc4d9b8c"></a>
<a class="el" href="classtest_uart__control_1_1behavior.html#a21b571630e861153c8507061cc4d9b8c">rst_comm_blocks</a>  </td><td class="memItemRight" valign="bottom"><b><span class="comment">std_logic</span><span class="vhdlchar"> </span></b></td></tr>
<tr class="memdesc:a21b571630e861153c8507061cc4d9b8c"><td class="mdescLeft"> </td><td class="mdescRight">Signal to connect with UUT. <br/></td></tr>
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<a class="el" href="classtest_uart__control_1_1behavior.html#a5894aac3d2f33bfa9c8079569ae53665">DAT_O</a>  </td><td class="memItemRight" valign="bottom"><b><span class="comment">std_logic_vector</span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar">nBitsLarge</span><span class="vhdlchar"> </span><span class="vhdlchar">-</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span> <span class="vhdldigit">1</span> <span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlkeyword">downto</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar"> </span> <span class="vhdldigit">0</span> <span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></td></tr>
<tr class="memdesc:a5894aac3d2f33bfa9c8079569ae53665"><td class="mdescLeft"> </td><td class="mdescRight">Signal to connect with UUT. <br/></td></tr>
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<tr class="memdesc:ae0c629e5bf429d5f1972891f357521b1"><td class="mdescLeft"> </td><td class="mdescRight">Signal to connect with UUT. <br/></td></tr>
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<a class="el" href="classtest_uart__control_1_1behavior.html#a9eee909c85ebe364cc76261f89cb4e3e">data_byte_tx</a>  </td><td class="memItemRight" valign="bottom"><b><span class="comment">std_logic_vector</span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar">nBits</span><span class="vhdlchar"> </span><span class="vhdlchar">-</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span> <span class="vhdldigit">1</span> <span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlkeyword">downto</span><span class="vhdlchar"> </span><span class="vhdlchar"> </span><span class="vhdlchar"> </span> <span class="vhdldigit">0</span> <span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></td></tr>
<tr class="memdesc:a9eee909c85ebe364cc76261f89cb4e3e"><td class="mdescLeft"> </td><td class="mdescRight">Signal to connect with UUT. <br/></td></tr>
<tr><td colspan="2"><h2><a name="Instantiations"></a>
Instantiations</h2></td></tr>
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<a class="el" href="classtest_uart__control_1_1behavior.html#a1619316ad715601eb5d3559db829ac05">uut</a> </td><td class="memItemRight" valign="bottom"> <b>uart_control</b> <em><a class="el" href="classuart__control.html"><Entity uart_control></a></em></td></tr>
<tr class="memdesc:a1619316ad715601eb5d3559db829ac05"><td class="mdescLeft"> </td><td class="mdescRight">Instantiate the Unit Under Test (UUT) <br/></td></tr>
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<hr/><a name="details" id="details"></a><h2>Detailed Description</h2>
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<p>Definition at line <a class="el" href="test_uart__control_8vhd_source.html#l00013">13</a> of file <a class="el" href="test_uart__control_8vhd_source.html">testUart_control.vhd</a>.</p>
</div><hr/><h2>Member Data Documentation</h2>
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<td class="memname"><a class="el" href="classtest_uart__control_1_1behavior.html#a7a7412e3b159b0289f620fa9ce2773b4">uart_control</a> <b><span class="vhdlchar"> </span></b> <code> [Component]</code></td>
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<p>Global reset. </p>
<p>Global clock Write enable Register address Start (Strobe) Done (ACK) Data Input (Wishbone) Data output (Wishbone) Signal to control the baud rate frequency 1 Byte to be send to <a class="el" href="classserial__transmitter.html">serial_transmitter</a> 1 Byte to be received by <a class="el" href="classserial__receiver.html">serial_receiver</a> Signal comming from <a class="el" href="classserial__transmitter.html">serial_transmitter</a> Signal to start sending serial data... Reset Communication blocks </p>
<p>Definition at line <a class="el" href="test_uart__control_8vhd_source.html#l00017">17</a> of file <a class="el" href="test_uart__control_8vhd_source.html">testUart_control.vhd</a>.</p>
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<hr/>The documentation for this class was generated from the following files:<ul>
<li>E:/uart_block/hdl/iseProject/<a class="el" href="test_uart__control_8vhd_source.html">testUart_control.vhd</a></li>
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