Subversion Repositories uart_block

\section{behavior Architecture Reference}
\label{classtest_uart__control_1_1behavior}\index{behavior@{behavior}}
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\subsection*{Processes}
 \begin{DoxyCompactItemize}
\item 
{\bf clk\-\_\-process}{\bfseries  (  )}\label{classtest_uart__control_1_1behavior_ac5bb218131b813f7908ec89476b31fca}
 
\item 
{\bf stim\-\_\-proc}{\bfseries  (  )}\label{classtest_uart__control_1_1behavior_ad2efa6785cff833c341e27596b21aeb5}
 
\end{DoxyCompactItemize}
\subsection*{Components}
 \begin{DoxyCompactItemize}
\item 
{\bf uart\-\_\-control}  {\bfseries }  
\begin{DoxyCompactList}\small\item\em Global reset. \end{DoxyCompactList}\end{DoxyCompactItemize}
\subsection*{Constants}
 \begin{DoxyCompactItemize}
\item 
{\bf clk\-\_\-period} {\bfseries time  \-:=  20  ns } \label{classtest_uart__control_1_1behavior_a732bfb9cc259526701d9009e857e3634}
 
\end{DoxyCompactItemize}
\subsection*{Signals}
 \begin{DoxyCompactItemize}
\item 
{\bf rst} {\bfseries std\-\_\-logic  \-:= '  0  ' } \label{classtest_uart__control_1_1behavior_a3366a143573fb930480d87caf161678a}
 
\begin{DoxyCompactList}\small\item\em Signal to connect with U\-U\-T. \end{DoxyCompactList}\item 
{\bf clk} {\bfseries std\-\_\-logic  \-:= '  0  ' } \label{classtest_uart__control_1_1behavior_a80022b7325ee7ece0351f096c061915c}
 
\begin{DoxyCompactList}\small\item\em Signal to connect with U\-U\-T. \end{DoxyCompactList}\item 
{\bf W\-E} {\bfseries std\-\_\-logic  \-:= '  0  ' } \label{classtest_uart__control_1_1behavior_a9908e5282e8d97753f43518d9cb826cd}
 
\begin{DoxyCompactList}\small\item\em Signal to connect with U\-U\-T. \end{DoxyCompactList}\item 
{\bf reg\-\_\-addr} {\bfseries std\-\_\-logic\-\_\-vector (   1    downto    0  )  \-:= (  others  = $>$ '  0  '  ) } \label{classtest_uart__control_1_1behavior_a2617c016d93a2d14227b30d854f9e883}
 
\begin{DoxyCompactList}\small\item\em Signal to connect with U\-U\-T. \end{DoxyCompactList}\item 
{\bf start} {\bfseries std\-\_\-logic  \-:= '  0  ' } \label{classtest_uart__control_1_1behavior_a3fcca4de2b35414fb663ee97c53ee658}
 
\begin{DoxyCompactList}\small\item\em Signal to connect with U\-U\-T. \end{DoxyCompactList}\item 
{\bf D\-A\-T\-\_\-\-I} {\bfseries std\-\_\-logic\-\_\-vector (  ( n\-Bits\-Large -\/   1  )    downto    0  )  \-:= (  others  = $>$ '  0  '  ) } \label{classtest_uart__control_1_1behavior_ac02e98da1e86d92785f262e5c1ca0a94}
 
\begin{DoxyCompactList}\small\item\em Signal to connect with U\-U\-T. \end{DoxyCompactList}\item 
{\bf data\-\_\-byte\-\_\-rx} {\bfseries std\-\_\-logic\-\_\-vector (  ( n\-Bits -\/   1  )    downto    0  )  \-:= (  others  = $>$ '  0  '  ) } \label{classtest_uart__control_1_1behavior_a2542843dc0c2f045329ede0cd8b0f29d}
 
\begin{DoxyCompactList}\small\item\em Signal to connect with U\-U\-T. \end{DoxyCompactList}\item 
{\bf tx\-\_\-data\-\_\-sent} {\bfseries std\-\_\-logic  \-:= '  0  ' } \label{classtest_uart__control_1_1behavior_ac165676e87cdd92109480bfa6d5cc444}
 
\begin{DoxyCompactList}\small\item\em Signal to connect with U\-U\-T. \end{DoxyCompactList}\item 
{\bf rx\-\_\-data\-\_\-ready} {\bfseries std\-\_\-logic  \-:= '  0  ' } \label{classtest_uart__control_1_1behavior_a5a02d4c51339f0711500faf0a9f9456c}
 
\begin{DoxyCompactList}\small\item\em Signal to connect with U\-U\-T. \end{DoxyCompactList}\item 
{\bf done} {\bfseries std\-\_\-logic } \label{classtest_uart__control_1_1behavior_af7e573dd5f4448685159c1050d974a92}
 
\begin{DoxyCompactList}\small\item\em Signal to connect with U\-U\-T. \end{DoxyCompactList}\item 
{\bf tx\-\_\-start} {\bfseries std\-\_\-logic } \label{classtest_uart__control_1_1behavior_acb24fd5efec09c4d3e95c15786f7c71d}
 
\begin{DoxyCompactList}\small\item\em Signal to connect with U\-U\-T. \end{DoxyCompactList}\item 
{\bf rst\-\_\-comm\-\_\-blocks} {\bfseries std\-\_\-logic } \label{classtest_uart__control_1_1behavior_a21b571630e861153c8507061cc4d9b8c}
 
\begin{DoxyCompactList}\small\item\em Signal to connect with U\-U\-T. \end{DoxyCompactList}\item 
{\bf D\-A\-T\-\_\-\-O} {\bfseries std\-\_\-logic\-\_\-vector (  ( n\-Bits\-Large -\/   1  )    downto    0  ) } \label{classtest_uart__control_1_1behavior_a5894aac3d2f33bfa9c8079569ae53665}
 
\begin{DoxyCompactList}\small\item\em Signal to connect with U\-U\-T. \end{DoxyCompactList}\item 
{\bf baud\-\_\-wait} {\bfseries std\-\_\-logic\-\_\-vector (  ( n\-Bits\-Large -\/   1  )    downto    0  ) } \label{classtest_uart__control_1_1behavior_ae0c629e5bf429d5f1972891f357521b1}
 
\begin{DoxyCompactList}\small\item\em Signal to connect with U\-U\-T. \end{DoxyCompactList}\item 
{\bf data\-\_\-byte\-\_\-tx} {\bfseries std\-\_\-logic\-\_\-vector (  ( n\-Bits -\/   1  )    downto    0  ) } \label{classtest_uart__control_1_1behavior_a9eee909c85ebe364cc76261f89cb4e3e}
 
\begin{DoxyCompactList}\small\item\em Signal to connect with U\-U\-T. \end{DoxyCompactList}\end{DoxyCompactItemize}
\subsection*{Instantiations}
 \begin{DoxyCompactItemize}
\item 
{\bf uut}  {\bfseries uart\-\_\-control}   \label{classtest_uart__control_1_1behavior_a1619316ad715601eb5d3559db829ac05}
 
\begin{DoxyCompactList}\small\item\em Instantiate the Unit Under Test (U\-U\-T) \end{DoxyCompactList}\end{DoxyCompactItemize}
 
 
\subsection{Detailed Description}
 
 
Definition at line 13 of file test\-Uart\-\_\-control.\-vhd.
 
 
 
\subsection{Member Data Documentation}
\index{test\-Uart\-\_\-control\-::behavior@{test\-Uart\-\_\-control\-::behavior}!uart\-\_\-control@{uart\-\_\-control}}
\index{uart\-\_\-control@{uart\-\_\-control}!testUart_control::behavior@{test\-Uart\-\_\-control\-::behavior}}
\subsubsection[{uart\-\_\-control}]{\setlength{\rightskip}{0pt plus 5cm}{\bf uart\-\_\-control} {\bfseries  } \hspace{0.3cm}{\ttfamily  [Component]}}\label{classtest_uart__control_1_1behavior_a7a7412e3b159b0289f620fa9ce2773b4}
 
 
Global reset. 
 
Global clock Write enable Register address Start (Strobe) Done (A\-C\-K) Data Input (Wishbone) Data output (Wishbone) Signal to control the baud rate frequency 1 Byte to be send to \doxyref{serial\-\_\-transmitter}{p.}{classserial__transmitter} 1 Byte to be received by \doxyref{serial\-\_\-receiver}{p.}{classserial__receiver} Signal comming from \doxyref{serial\-\_\-transmitter}{p.}{classserial__transmitter} Signal to start sending serial data... Reset Communication blocks 
 
Definition at line 17 of file test\-Uart\-\_\-control.\-vhd.
 
 
 
The documentation for this class was generated from the following files\-:\begin{DoxyCompactItemize}
\item 
E\-:/uart\-\_\-block/hdl/ise\-Project/test\-Uart\-\_\-control.\-vhd\end{DoxyCompactItemize}