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https://opencores.org/ocsvn/usb_fpga_1_15/usb_fpga_1_15/trunk
Subversion Repositories usb_fpga_1_15
[/] [usb_fpga_1_15/] [trunk/] [examples/] [usb-fpga-2.13/] [2.13c/] [memfifo/] [fpga/] [usb_fpga_2_13_mem.ucf] - Rev 4
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#################################################################################################### Controller 0## Memory Device: DDR3_SDRAM->Components->MT41J128M16XX-125## Data Width: 16## Time Period: 2500## Data Mask: 1################################################################################################################ NET - IOSTANDARD ##################NET "ddr3_dq[0]" LOC = "H1" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: IO_L13P_T2_MRCC_35NET "ddr3_dq[1]" LOC = "F1" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: IO_L13N_T2_MRCC_35NET "ddr3_dq[2]" LOC = "E2" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: IO_L14P_T2_SRCC_35NET "ddr3_dq[3]" LOC = "E1" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: IO_L14N_T2_SRCC_35NET "ddr3_dq[4]" LOC = "F4" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: IO_L16N_T2_35NET "ddr3_dq[5]" LOC = "C1" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: IO_L17P_T2_35NET "ddr3_dq[6]" LOC = "F3" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: IO_L17N_T2_35NET "ddr3_dq[7]" LOC = "D2" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: IO_L18P_T2_35NET "ddr3_dq[8]" LOC = "G4" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: IO_L20P_T3_35NET "ddr3_dq[9]" LOC = "H5" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: IO_L20N_T3_35NET "ddr3_dq[10]" LOC = "G3" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: IO_L22P_T3_35NET "ddr3_dq[11]" LOC = "H6" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: IO_L22N_T3_35NET "ddr3_dq[12]" LOC = "J2" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: IO_L23P_T3_35NET "ddr3_dq[13]" LOC = "J3" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: IO_L23N_T3_35NET "ddr3_dq[14]" LOC = "K1" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: IO_L24P_T3_35NET "ddr3_dq[15]" LOC = "K2" | IOSTANDARD = SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: IO_L24N_T3_35NET "ddr3_dqs_p[0]" LOC = "H2" | IOSTANDARD = DIFF_SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: IO_L15P_T2_DQS_35NET "ddr3_dqs_n[0]" LOC = "G2" | IOSTANDARD = DIFF_SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: IO_L15N_T2_DQS_35NET "ddr3_dqs_p[1]" LOC = "J4" | IOSTANDARD = DIFF_SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: IO_L21P_T3_DQS_35NET "ddr3_dqs_n[1]" LOC = "H4" | IOSTANDARD = DIFF_SSTL15 | SLEW = FAST | IN_TERM = UNTUNED_SPLIT_40 ; # Pad function: IO_L21N_T3_DQS_35NET "ddr3_addr[0]" LOC = "C5" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: IO_L9P_T1_DQS_AD7P_35NET "ddr3_addr[1]" LOC = "B6" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: IO_L8N_T1_AD14N_35NET "ddr3_addr[2]" LOC = "C7" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: IO_L8P_T1_AD14P_35NET "ddr3_addr[3]" LOC = "D5" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: IO_L7N_T1_AD6N_35NET "ddr3_addr[4]" LOC = "A3" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: IO_L7P_T1_AD6P_35NET "ddr3_addr[5]" LOC = "E7" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: IO_L6P_T0_35NET "ddr3_addr[6]" LOC = "A4" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: IO_L5N_T0_AD13N_35NET "ddr3_addr[7]" LOC = "C6" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: IO_L5P_T0_AD13P_35NET "ddr3_addr[8]" LOC = "A6" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: IO_L4N_T0_35NET "ddr3_addr[9]" LOC = "D8" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: IO_L4P_T0_35NET "ddr3_addr[10]" LOC = "B2" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: IO_L2N_T0_AD12N_35NET "ddr3_addr[11]" LOC = "A5" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: IO_L2P_T0_AD12P_35NET "ddr3_addr[12]" LOC = "B3" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: IO_L1N_T0_AD4N_35NET "ddr3_addr[13]" LOC = "B7" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: IO_L1P_T0_AD4P_35NET "ddr3_ba[0]" LOC = "E5" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: IO_L10N_T1_AD15N_35NET "ddr3_ba[1]" LOC = "A1" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: IO_L10P_T1_AD15P_35NET "ddr3_ba[2]" LOC = "E6" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: IO_L9N_T1_DQS_AD7N_35NET "ddr3_cas_n" LOC = "D3" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: IO_L11N_T1_SRCC_35NET "ddr3_cke[0]" LOC = "B1" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: IO_L12N_T1_MRCC_35NET "ddr3_ras_n" LOC = "E3" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: IO_L11P_T1_SRCC_35NET "ddr3_we_n" LOC = "D4" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: IO_L12P_T1_MRCC_35NET "ddr3_reset_n" LOC = "J5" | IOSTANDARD = LVCMOS15 | SLEW = FAST ; # Pad function: IO_L18N_T2_35NET "ddr3_odt[0]" LOC = "F5" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: IO_0_35NET "ddr3_dm[0]" LOC = "G1" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: IO_L16P_T2_35NET "ddr3_dm[1]" LOC = "G6" | IOSTANDARD = SSTL15 | SLEW = FAST ; # Pad function: IO_L19P_T3_35NET "ddr3_ck_p[0]" LOC = "C4" | IOSTANDARD = DIFF_SSTL15 | SLEW = FAST ; # Pad function: IO_L3P_T0_DQS_AD5P_35NET "ddr3_ck_n[0]" LOC = "B4" | IOSTANDARD = DIFF_SSTL15 | SLEW = FAST ; # Pad function: IO_L3N_T0_DQS_AD5N_35