Subversion Repositories usb_fpga_2_04

NET "fxclk_in" TNM_NET = "fxclk_in";
TIMESPEC "ts_fxclk_in" = PERIOD "fxclk_in" 20 ns HIGH 50 %;
NET "fxclk_in"  LOC = "Y18" | IOSTANDARD = LVCMOS33 ;

NET "pb<0>"  LOC = "P20" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
NET "pb<1>"  LOC = "N17" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
NET "pb<2>"  LOC = "P21" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
NET "pb<3>"  LOC = "R21" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
NET "pb<4>"  LOC = "T21" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
NET "pb<5>"  LOC = "U21" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
NET "pb<6>"  LOC = "P19" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
NET "pb<7>"  LOC = "R19" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;

NET "pd<0>"  LOC = "T20" | IOSTANDARD = LVCMOS33 ;
NET "pd<1>"  LOC = "U20" | IOSTANDARD = LVCMOS33 ;
NET "pd<2>"  LOC = "U18" | IOSTANDARD = LVCMOS33 ;
NET "pd<3>"  LOC = "U17" | IOSTANDARD = LVCMOS33 ;
NET "pd<4>"  LOC = "W19" | IOSTANDARD = LVCMOS33 ;
NET "pd<5>"  LOC = "W20" | IOSTANDARD = LVCMOS33 ;
NET "pd<6>"  LOC = "W21" | IOSTANDARD = LVCMOS33 ;
NET "pd<7>"  LOC = "W22" | IOSTANDARD = LVCMOS33 ;