Subversion Repositories usb_fpga_2_13

NET "ifclk_in" TNM_NET = "ifclk_in";
TIMESPEC "ts_ifclk_in" = PERIOD "ifclk_in" 20 ns HIGH 50 %;
NET "ifclk_in"  LOC = "J19" | IOSTANDARD = LVCMOS33 ;

NET "fd<0>"   LOC = "P20" | IOSTANDARD = LVCMOS33 ;
NET "fd<1>"   LOC = "N17" | IOSTANDARD = LVCMOS33 ;
NET "fd<2>"   LOC = "P21" | IOSTANDARD = LVCMOS33 ;
NET "fd<3>"   LOC = "R21" | IOSTANDARD = LVCMOS33 ;
NET "fd<4>"   LOC = "T21" | IOSTANDARD = LVCMOS33 ;
NET "fd<5>"   LOC = "U21" | IOSTANDARD = LVCMOS33 ;
NET "fd<6>"   LOC = "P19" | IOSTANDARD = LVCMOS33 ;
NET "fd<7>"   LOC = "R19" | IOSTANDARD = LVCMOS33 ;
NET "fd<8>"   LOC = "T20" | IOSTANDARD = LVCMOS33 ;
NET "fd<9>"   LOC = "U20" | IOSTANDARD = LVCMOS33 ;
NET "fd<10>"  LOC = "U18" | IOSTANDARD = LVCMOS33 ;
NET "fd<11>"  LOC = "U17" | IOSTANDARD = LVCMOS33 ;
NET "fd<12>"  LOC = "W19" | IOSTANDARD = LVCMOS33 ;
NET "fd<13>"  LOC = "W20" | IOSTANDARD = LVCMOS33 ;
NET "fd<14>"  LOC = "W21" | IOSTANDARD = LVCMOS33 ;
NET "fd<15>"  LOC = "W22" | IOSTANDARD = LVCMOS33 ;

NET "FLAGB" LOC = "K18" | IOSTANDARD = LVCMOS33 ;

NET "SLRD"  LOC = "AB22" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;
NET "SLWR"  LOC = "AB21" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;

NET "SLOE"      LOC = "M20" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;      # PA2
NET "FIFOADR0"  LOC = "N19" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;      # PA4
NET "FIFOADR1"  LOC = "N18" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;      # PA5
NET "PKTEND"    LOC = "P17" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;      # PA6
NET "RESET"     LOC = "R18" | IOSTANDARD = LVCMOS33 ;                   # PA7

NET "CONT"      LOC = "M18" | IOSTANDARD = LVCMOS33 ;                   # PA3