Subversion Repositories xucpu

<?xml version="1.0" encoding="UTF-8"?>
<wave_config>
   <wave_state>
   </wave_state>
   <db_ref_list>
      <db_ref path="/home/jurgen/Projects/lisp/FPGA/startup_sim_isim_beh.wdb" id="1" type="auto">
         <top_modules>
            <top_module name="arrayio" />
            <top_module name="components" />
            <top_module name="controllers" />
            <top_module name="mux_parts" />
            <top_module name="numeric_std" />
            <top_module name="ram_parts" />
            <top_module name="startup_sim" />
            <top_module name="std_logic_1164" />
            <top_module name="std_logic_arith" />
            <top_module name="std_logic_textio" />
            <top_module name="std_logic_unsigned" />
            <top_module name="textio" />
            <top_module name="vcomponents" />
            <top_module name="vital_primitives" />
            <top_module name="vital_timing" />
            <top_module name="vpkg" />
         </top_modules>
      </db_ref>
   </db_ref_list>
   <WVObjectSize size="35" />
   <wvobject fp_name="/startup_sim/clock" type="logic" db_ref_id="1">
      <obj_property name="ElementShortName">clock</obj_property>
      <obj_property name="ObjectShortName">clock</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/reset" type="logic" db_ref_id="1">
      <obj_property name="ElementShortName">reset</obj_property>
      <obj_property name="ObjectShortName">reset</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/RST1/rst" type="logic" db_ref_id="1">
      <obj_property name="ElementShortName">rst</obj_property>
      <obj_property name="ObjectShortName">rst</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/CLOCK1/clk_out" type="logic" db_ref_id="1">
      <obj_property name="ElementShortName">clk_out</obj_property>
      <obj_property name="ObjectShortName">clk_out</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/pc_out" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">pc_out[14:0]</obj_property>
      <obj_property name="ObjectShortName">pc_out[14:0]</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/PC/q" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">q[14:0]</obj_property>
      <obj_property name="ObjectShortName">q[14:0]</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/MEM1/address_reg_2" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">address_reg_2[9:0]</obj_property>
      <obj_property name="ObjectShortName">address_reg_2[9:0]</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/MEM1/q2" type="array" db_ref_id="1">
      <obj_property name="DisplayName">label</obj_property>
      <obj_property name="ElementShortName">q2[15:0]</obj_property>
      <obj_property name="ObjectShortName">q2[15:0]</obj_property>
      <obj_property name="label">INSTRUCTION</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/IR/q" type="array" db_ref_id="1">
      <obj_property name="DisplayName">label</obj_property>
      <obj_property name="ElementShortName">q[15:0]</obj_property>
      <obj_property name="ObjectShortName">q[15:0]</obj_property>
      <obj_property name="label">IR_Q</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/DR/q" type="array" db_ref_id="1">
      <obj_property name="DisplayName">label</obj_property>
      <obj_property name="ElementShortName">q[15:0]</obj_property>
      <obj_property name="ObjectShortName">q[15:0]</obj_property>
      <obj_property name="label">DR_Q</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/CTRL1/curr_state" type="other" db_ref_id="1">
      <obj_property name="ElementShortName">curr_state</obj_property>
      <obj_property name="ObjectShortName">curr_state</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/pc_src" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">pc_src[2:0]</obj_property>
      <obj_property name="ObjectShortName">pc_src[2:0]</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/ld_pc" type="logic" db_ref_id="1">
      <obj_property name="ElementShortName">ld_pc</obj_property>
      <obj_property name="ObjectShortName">ld_pc</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/ld_ir" type="logic" db_ref_id="1">
      <obj_property name="ElementShortName">ld_ir</obj_property>
      <obj_property name="ObjectShortName">ld_ir</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/ld_dp" type="logic" db_ref_id="1">
      <obj_property name="ElementShortName">ld_dp</obj_property>
      <obj_property name="ObjectShortName">ld_dp</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/CTRL1/operation" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">operation[3:0]</obj_property>
      <obj_property name="ObjectShortName">operation[3:0]</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/CTRL1/reg_addr_a" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">reg_addr_a[3:0]</obj_property>
      <obj_property name="ObjectShortName">reg_addr_a[3:0]</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/CTRL1/reg_addr_b" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">reg_addr_b[3:0]</obj_property>
      <obj_property name="ObjectShortName">reg_addr_b[3:0]</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/reg_src" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">reg_src[2:0]</obj_property>
      <obj_property name="ObjectShortName">reg_src[2:0]</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/REG_MUX/y" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">y[15:0]</obj_property>
      <obj_property name="ObjectShortName">y[15:0]</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/RF1/d" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">d[15:0]</obj_property>
      <obj_property name="ObjectShortName">d[15:0]</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/reg_wr" type="logic" db_ref_id="1">
      <obj_property name="ElementShortName">reg_wr</obj_property>
      <obj_property name="ObjectShortName">reg_wr</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/RF1/reg[0]" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">[0]</obj_property>
      <obj_property name="ObjectShortName">reg[0]</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/RF1/reg[1]" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">[1]</obj_property>
      <obj_property name="ObjectShortName">reg[1]</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/RF1/reg[2]" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">[2]</obj_property>
      <obj_property name="ObjectShortName">reg[2]</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/RF1/reg[3]" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">[3]</obj_property>
      <obj_property name="ObjectShortName">reg[3]</obj_property>
   </wvobject>
   <wvobject fp_name="divider33" type="divider">
      <obj_property name="label">Memory</obj_property>
      <obj_property name="DisplayName">label</obj_property>
      <obj_property name="BkColor">128 128 255</obj_property>
      <obj_property name="TextColor">230 230 230</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/data_address" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">data_address[14:0]</obj_property>
      <obj_property name="ObjectShortName">data_address[14:0]</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/databus_write" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">databus_write[15:0]</obj_property>
      <obj_property name="ObjectShortName">databus_write[15:0]</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/mem_wr" type="logic" db_ref_id="1">
      <obj_property name="ElementShortName">mem_wr</obj_property>
      <obj_property name="ObjectShortName">mem_wr</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/DEC1/bus_sel" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">bus_sel[2:0]</obj_property>
      <obj_property name="ObjectShortName">bus_sel[2:0]</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/DEC1/gpio_1" type="logic" db_ref_id="1">
      <obj_property name="ElementShortName">gpio_1</obj_property>
      <obj_property name="ObjectShortName">gpio_1</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/OUT1/ena" type="logic" db_ref_id="1">
      <obj_property name="ElementShortName">ena</obj_property>
      <obj_property name="ObjectShortName">ena</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/OUT1/we" type="logic" db_ref_id="1">
      <obj_property name="ElementShortName">we</obj_property>
      <obj_property name="ObjectShortName">we</obj_property>
   </wvobject>
   <wvobject fp_name="/startup_sim/uut/OUT1/port_out" type="array" db_ref_id="1">
      <obj_property name="ElementShortName">port_out[7:0]</obj_property>
      <obj_property name="ObjectShortName">port_out[7:0]</obj_property>
   </wvobject>
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